FDD3672 Datasheet, PDF (8/11 Pages) Fairchild Semiconductor – N-Channel UltraFET Trench MOSFET 100V, 44A, 28mΩ

PSPICE Electrical Model
.SUBCKT FDD3672 2 1 3 ;
CA 12 8 5.8e-10
Cb 15 14 6.8e-10
Cin 6 8 1.6e-9
Dbody 7 5 DbodyMOD
Dbreak 5 11 DbreakMOD
Dplcap 10 5 DplcapMOD
Ebreak 11 7 17 18 105
Eds 14 8 5 8 1
Egs 13 8 6 8 1
Esg 6 10 6 8 1
Evthres 6 21 19 8 1
Evtemp 20 6 18 22 1
It 8 17 1
Lgate 1 9 9.56e-9
Ldrain 2 5 1.0e-9
Lsource 3 7 4.45e-9
RLgate 1 9 95.6
RLdrain 2 5 10
RLsource 3 7 44.5
rev May 2002
GATE
1
DPLCAP ₅
10
RSLC2
RSLC1
51
5
51
ESLC
DBREAK
11
LDRAIN
DRAIN
2
RLDRAIN
LGATE
RLGATE
-
ESG
6
8
+
EVTHRES
EVTEMP
+ ₁₉ -
8
RGATE _{+ 18 - 6}
9
20 ²²
CIN
S1A
12 ₁₃
8
S2A
14
15
13
50
RDRAIN
16
21
+
17
EBREAK 18
-
MWEAK
DBODY
MMED
MSTRO
8
7
RSOURCE
LSOURCE
SOURCE
3
RLSOURCE
RBREAK
17
18
Mmed 16 6 8 8 MmedMOD
Mstro 16 6 8 8 MstroMOD
Mweak 16 21 8 8 MweakMOD
Rbreak 17 18 RbreakMOD 1
Rdrain 50 16 RdrainMOD 6.0e-3
Rgate 9 20 1.5
RSLC1 5 51 RSLCMOD 1.0e-6
RSLC2 5 50 1.0e3
Rsource 8 7 RsourceMOD 9.5e-3
Rvthres 22 8 RvthresMOD 1
Rvtemp 18 19 RvtempMOD 1
S1a 6 12 13 8 S1AMOD
S1b 13 12 13 8 S1BMOD
S2a 6 15 14 13 S2AMOD
S2b 13 15 14 13 S2BMOD
S1B
S2B
CA
13
CB
+
+ ¹⁴
EGS
6
8
-
EDS
5
8
-
RVTEMP
19
IT
-
VBAT
+
8
22
RVTHRES
Vbat 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*98),3))}
.MODEL DbodyMOD D (IS=1.0E-11 N=1.05 RS=3.7e-3 TRS1=2.5e-3 TRS2=1.0e-6
+ CJO=1.2e-9 M=0.58 TT=3.75e-8 XTI=4.0)
.MODEL DbreakMOD D (RS=15 TRS1=4.0e-3 TRS2=-5.0e-6)
.MODEL DplcapMOD D (CJO=3.8e-10 IS=1.0e-30 N=10 M=0.60)
.MODEL MmedMOD NMOS (VTO=3.6 KP=3 IS=1e-40 N=10 TOX=1 L=1u W=1u RG=1.5)
.MODEL MstroMOD NMOS (VTO=4.3 KP=59 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL MweakMOD NMOS (VTO=3.09 KP=0.05 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=15 RS=0.1)
.MODEL RbreakMOD RES (TC1=9.0e-4 TC2=-1.0e-7)
.MODEL RdrainMOD RES (TC1=11.0e-3 TC2=5.0e-5)
.MODEL RSLCMOD RES (TC1=3.0e-3 TC2=1.0e-6)
.MODEL RsourceMOD RES (TC1=4.0e-3 TC2=1.0e-6)
.MODEL RvthresMOD RES (TC1=-3.5e-3 TC2=-1.5e-5)
.MODEL RvtempMOD RES (TC1=-4.3e-3 TC2=1.5e-6)
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-5.0 VOFF=-3.5)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.5 VOFF=-5.0)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-0.5 VOFF=0.3)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=0.3 VOFF=-0.5)
.ENDS
Note: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank
Wheatley.
©2002 Fairchild Semiconductor Corporation
FDD3672 Rev. A