FAN5235 Datasheet, PDF (8/15 Pages) Fairchild Semiconductor – System Electronics Regulator for Mobile PCs

FAN5235
Peak current is DC output current plus peak ripple current:
I_pk
≈
I_dc
+
TV₀
2L
= 5A +
4µsec • 5V
2 • 5µH ^{= 7A}
where T is the maximum period, V_O is output voltage, and L
is the inductance. This current generates a voltage on the
low-side MOSFET of 7A • 20mΩ = 140mV. The current
limit threshold is typically 150mV (worst-case 135mV) with
R2 = 1KΩ, and so this value is suitable. R2 could be
increased a further 10% if additional noise margin is deemed
necessary.
Precision Current Limit
Precision current limiting can be achieved by placing a
discrete sense resistor between the source of the low-side
MOSFET and ground.
In this case, current limit accuracy is set by the tolerance of
the IC, +10%.
HSD
SW
LSD
ISEN
GND
Figure 4. Using a Precision Current Sense Resistor
Shutdown (SDWN)
The SDWN pin turns off all 5 converters (+5V, +3.3V, and
+12V, 5V/3.3V-ALWAYS) and puts the FAN5235 into a low-
power mode (Shutdown mode).
This mode of operation implies the use of a push button
switch between SDWN and Vin. Pushing the button allows
(for the duration of the contact) to power the 3.3V-ALWAYS
and 5V-ALWAYS long enough for the uC to power up and in
turn latch the SDWN pin high.
Once the SDWN is high then the ALWAYS voltages are
enabled to go high if the respective SDN3.3 and SDN5 go
high.
MAIN 3.3V and 5V Softstart, Sequencing and
Stand-by
Softstart of the 3.3V and 5V converters is accomplished by
means of an external capacitor between pins SDN3.3 (SDN5)
and ground.
The 3.3V (5V) main converter is turned ON if SDWN and
SDN3.3 (SDN5) are both high and is turned off if either SDWN
or SDN3.3 (SDN5) is low.
Stand-by mode is defined as the condition by which V-Mains
are OFF and V-ALWAYS are ON (SDWN=1 and
SDN3.3=SDN5=0).
ALWAYS mode of Operation
If it is desired that 5V-ALWAYS and 3.3V-ALWAYS are always
ON then the SDWN pin must be connected to Vin permanently.
This way the two ALWAYS regulators come up as soon as there
is power while the state of the Main regulators can be controlled
via the SDN5 and SDN3.3 pins.
Sequencing Table
SDN5
X
SDN3.3
X
SDWN
0
3V&5V
ALWAYS
0
0
0
1
1
1
0
1
1
0
1
1
1
1
1
1
1
5V
MAIN
0
0
1
0
1
3.3V
MAIN
0
0
0
1
1
3.3V Voltage Adjustment
The output voltage of the 3.3V converter can be increased by
as much as 10% by inserting a resistor divider in the feedback
line. The feedback pin impedance is about 66KΩ. Thus, for
example, to increase the output of the 3.3V converter by 10%,
use a 2.21KΩ/33.2KΩ divider.
Note that the output of the 5V regulator cannot be adjusted.
The feedback line of the 5V regulator is used internally as a
5V supply and, therefore, cannot tolerate any impedance in
series with it.
3.3V and 5V Main Overvoltage Protection
(Soft Crowbar)
When the output voltage of the 3.3V (or the 5V) converter
exceeds approximately 115% of nominal, the converter enters
the over-voltage (OV) protection mode, with the goal of pro-
tecting the load from damage. During operation, severe load
dump or a short of an upper MOSFET could cause the output
voltage to increase significantly over normal operation range
without circuit protection. When the output exceeds the over-
voltage threshold, the over-voltage comparator forces the
lower gate driver high and turns the lower MOSFET on. This
will pull down the output voltage and eventually may blow the
battery fuse. As soon as output voltage drops below the thresh-
old, OVP comparator is disengaged.
The OVP scheme also provides a soft crowbar function
(bang-bang control followed by blow of the fuse) which
helps to tackle severe load transients but does not invert out-
put voltage when activated—a common problem for OVP
schemes with a latch. The prevention of output inversion
eliminates the need for a Schottky diode across the load.
REV. 1.3.3 1/3/02
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