FAN5037 Datasheet, PDF (8/11 Pages) Fairchild Semiconductor – Adjustable Switching Regulator Controller

FAN5037
PRODUCT SPECIFICATION
where TF = Tolerance Factor for the sense resistor and 0.6A
accounts for the inductor ripple current.
Since the value of the sense resistor is often less than 10mΩ,
care should be taken in the layout of the PCB. Trace resis-
tance can contribute significant errors. The traces to the
IFBH and IFBL pins of the FAN5037 should be Kelvin con-
nected to the pads of the current-sense resistor. To minimize
the influence of noise, the two traces should be run next to
each other.
Schottky Diode
In Figure 1, MOSFET Q1 and flyback diode D1 are used as
complementary switches in order to maintain a constant cur-
rent through the output inductor L2. As a result, D1 will have
to carry the full current of the output load when the power
MOSFET is turned off. The power in the diode is a direct
function of the forward voltage at the rated load current dur-
ing the off time of the FET. The following equation can be
used to estimate the diode power:
P_DIODE = I_D × V_D × (1 – DutyCycle)
where ID is the forward current of the diode, VD is the for-
ward voltage of the diode, and DutyCycle is defined the
same as
Duty Cycle = ^{V-----o----u---t}
Vin
For the Motorola MBRB1545CT Rectifier in Figure 1,
P_DIODE = 10A × 0.65 × (1 – 73.1%) = 1.75W
It is recommended that the diode T0-220 package be
attached to a heatsink.
Board Design Considerations
MOSFET Placement
Placement of the power MOSFET is critical in the design of
the switch-mode regulator. The MOSFET should be placed
in such a way as to minimize the length of the gate drive path
from the FAN5037 SDRV pin. This trace should be kept
under 0.5" for optimal performance. Excessive lead length
on this trace will cause high frequency noise resulting from
the parasitic inductance and capacitance of the trace. Since
this voltage can transition nearly 12V in around 100nsec, the
resultant ringing and noise would be very difficult to sup-
press. This trace should be routed on one layer only and kept
well away from the “quiet” analog pins of the device: CEXT,
IFBH, IFBL, and GND. Refer to Figure 2. A 4.7Ω resistor in
series with the MOSFET gate can decrease this layout criti-
cality. Refer to Figure 1.
Inductor and Schottky Diode Placement
The inductor and fly-back Schottky diode need to be placed
close to the source of the power MOSFET for the same rea-
sons stated above. The node connecting the inductor and
Schottky diode will swing between the drain voltage of the
FET and the forward voltage of the Schottky diode. It is rec-
ommended that this node be converted to a plane if possible.
This node will be part of the high current path in the design,
and as such it is best treated as a plane in order to minimize
the parasitic resistance and inductance on that node. Since
most PC board manufacturers utilize 1/2 oz copper on the
top and bottom signal layers of the PCB, it is not recom-
mended to use these layers to route the high current portions
of the regulator design. Since it is more common to use 1 oz.
copper on the PCB inner layers, it is recommended to use
those layers to route the high current paths in the design.
Example of
a Good Layout
Example of
a Problem Layout
Noisy signal is routed
away from quiet pins and the
trace length is kept under 0.5in.
The gate resistor is as close
as possible to the MOSFET.
5
4
6
3
7
2
8
1
5
4
6
3
7
2
8
1
= "Quiet" Pins
Figure 3. Examples of good and poor layouts
Noisy signal radiates
onto quiet pins and the
trace is too long.
Gate resistor is far away
from the MOSFET.
8
REV. 1.0.3 9/26/01