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FAN4855 Datasheet, PDF (8/12 Pages) Fairchild Semiconductor – 500mA High Efficiency Boost Regulator with Adjustable Output, Shutdown and Low Battery Detect
Block Diagram
LBO
4
LBI 3
0.39V
–
A3
+
VIN
1
VOUT
Start-Up
Minimum
Off-Time
Logic
Variable
On-Time
One Shot
ILIMIT SHDN
VL
7
ILIMIT
Synchronous
Rectifier
Control
Q2
+
A2
–
Control
Logic
SHDN
2
SHDN
VOUT
6
Q1
N
Current
Limit
Control
ILIMIT
1
–
A1
+
VREF
8
GND
VFB
5
Functional Description
Boost Regulator
FAN4855 is an adjustable boost regulator that combines
variable ON and minimum OFF architecture with syn-
chronous rectification. Unique control circuitry provides
high-efficiency power conversion for both light and heavy
loads by transitioning between discontinuous and contin-
uous conduction mode based on load conditions. There
is no oscillator; a constant-peak-current limit of 0.8A in
the inductor allows the inductor current to vary between
this peak limit and some lesser value. The switching fre-
quency depends upon the load, the input and output volt-
age ranging up to 430kHz.
The input voltage VIN comes to VIN pin and through the
external inductor to the VL pin of the device. The loop
from VOUT closes through the external resistive voltage
divider to the feedback pin VFB. The transfer ratio of this
divider determines the output voltage. When VFB voltage
drops below the VREF = 1.24V the error amplifier A1 sig-
nals to regulator to deliver charge to the output by trig-
gering the Variable On-Time One Shot. One Shot
generates a pulse at the gate of the Power NMOS tran-
sistor Q1. This transistor will charge the Inductor L1 for
the time interval TON resulting in a peak current given by:
IL(PEAK)
=
T----O----N-----×-----V----I--N--
L1
When the one–shot times out, the Q1 transistor releases
the VL pin, allowing the inductor to fly-back and momen-
tarly charge the output through the body diode of the
transistor Q2. But, as the voltage across the Q2 changes
polarity, its gate will be driven low by the Synchronous
Rectifier Control Circuit (SRC), causing Q2 to short out
its body diode. The inductor then delivers the charge to
the load by discharging into it through Q2.
Under light load conditions, the amount of energy deliv-
ered in this single pulse satisfies the voltage-control loop,
and the converter does not command any more energy
pulses until the output drops again below the lower-volt-
age threshold. Under medium and heavy loads, a single
energy pulse is not sufficient to force the output voltage
above its upper threshold before the minimum off time
has expired and a second charge cycle is commanded.
Since the inductor current has not reached zero in this
case, the peak current is greater than the previous value
at the end of the second cycle. The result is a ratcheting
of inductor current until either the output voltage is satis-
fied, or the converter reaches its set current limit.
After a period of time TOFF > 1µS, determined by Mini-
mum Off–Time Logic and if VOUT is low (VFB < VREF), the
Variable On-Time One Shot will be turned ON again and
the process repeats.
The output capacitor of the converter filters the variable
component, limiting the output voltage ripple to a value
determined by its capacitance and its ESR.
8
FAN4855 Rev. 1.0.1
www.fairchildsemi.com