NC7SB3157_08 Datasheet, PDF (7/11 Pages) Fairchild Semiconductor – Low-Voltage SPDT Analog Switch or 2:1Multiplexer / De-multiplexer Bus Switch

AC Loading and Waveforms
FROM
OUTPUT
UNDER
TEST
V_I
RU
C_L
RD
Notes:
Input driven by 50Ω source terminated in 50Ω
C_L includes load and stray capacitance
Input PRR = 1.0 MHz; t_W = 500 ns
Figure 12. AC Test Circuit
t_r = 2.5ns
Switch
Input
10%
Output
90%
90%
t_r = 2.5ns
VCC
50%
50%
t_W
tPLH
10%
tPHL
GND
V_OH
50%
50%
V_OL
tr = 2.5ns
Control
Input
10%
90%
50%
t_PZL
90%
50%
Output
50%
tPZH
Output
50%
Figure 13. AC Waveforms
t_r = 2.5ns
V_CC
10%
t_PLZ
GND
VTRI
VOL+0.3V
VOL
tPHZ
V_OH
VOH–0.3V
VTRI
V_IN
Logic
Input
B0
A
B1
VOUT
S
R_L
C_L
Logic
Input
VOUT
Figure 14. Break-Before-Make Interval Timing
0.9 x V_OUT
t_D
© 2006 Fairchild Semiconductor Corporation
NC7SB3157, FSA3157 Rev. 1.0.3
7
www.fairchildsemi.com