FAN5308 Datasheet, PDF (7/11 Pages) Fairchild Semiconductor – 800mA High-Efficiency Step-Down DC-DC Converter

Block Diagram
EN
V_IN
DIGITAL
SOFT START
FB
0.8V
ERROR
AMP
IS
PFM
REF ^COMP
COMP
GND
IS
OSC
SLOPE COMPENSATION
OVER
VOLTAGE
COMP
REF FB
UNDER-VOLTAGE
LOCKOUT
IS
CURRENT
SENSE
LOGIC
MOSFET
SW
CONTROL
DRIVER
NEG.
LIMIT
COMP
NEG.
LIMIT
SENSE
GND
Figure 3. Block Diagram
Detailed Operation Description
The FAN5308 is a step-down converter operating in a current-
mode PFM/PWM architecture with a typical switching frequency
of 1.3MHz. At moderate to heavy loads, the converter operates
in pulse-width-modulation (PWM) mode. At light loads the con-
verter enters a power-save mode (PFM pulse skipping) to keep
the efficiency high.
PWM Mode
In PWM mode, the device operates at a fixed frequency of
1.3MHz. At the beginning of each clock cycle, the P-channel
transistor is turned on. The inductor current ramps up and is
monitored via an internal circuit. The P-channel switch is turned
off when the sensed current causes the PWM comparator to trip
when the output voltage is in regulation or when the inductor
current reaches the current limit (set internally to typically
1500mA). After a minimum dead time the N-channel transistor
is turned on and the inductor current ramps down. As the clock
cycle is completed, the N-channel switch is turned off and the
next clock cycle starts.
PFM (Power Save) Mode
As the load current decreases and the inductor current reaches
negative value, the converter enters pulse-frequency-modula-
tion (PFM) mode. The transition point for the PFM mode is given
by the equation:
I_OUT = V_OUT × ^1-----–-----⁽-2-V----_×-^O---^U-L---^T--_×---^⁄--f-V----^I--^N----⁾
The typical output current when the device enters PFM mode is
150mA for input voltage of 3.6V and output voltage of 1.2V. In
PFM mode the device operates with a variable frequency and
constant peak current, thus reducing the quiescent current to
minimum. Consequently, the high efficiency is maintained at
light loads. As soon as the output voltage falls below a thresh-
old, set at 0.8% above the nominal value, the P-channel transis-
tor is turned on and the inductor current ramps up. The P-
channel switch turns off and the N-channel turns on as the peak
inductor current is reached (typical 450mA).
The N-channel transistor is turned off before the inductor cur-
rent becomes negative. At this time the P-channel is switched
on again starting the next pulse. The converter continues these
pulses until the high threshold (typical 1.6% above nominal
value) is reached. A higher output voltage in PFM mode gives
additional headroom for the voltage drop during a load transient
from light to full load. The voltage overshoot during this load
transient is also minimized due to active regulation during turn
on of the N-channel rectifier switch. The device stays in sleep
mode until the output voltage falls below the low threshold. The
FAN5308 enters the PWM mode as soon as the output voltage
can no longer be regulated in PFM with constant peak current.
100% Duty Cycle Operation
As the input voltage approaches the output voltage and the duty
cycle exceeds the typical 95%, the converter turns the P-chan-
nel transistor continuously on. In this mode the output voltage is
equal to the input voltage minus the voltage drop across the P-
channel transistor:
V_OUT = V_IN – I_LOAD × (R_dsON + R_L), where
R_dsON = P-channel switch ON resistance
I_LOAD = Output current
R_L = Inductor DC resistance
FAN5308 Rev. 1.0.1
7
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