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100325 Datasheet, PDF (7/9 Pages) National Semiconductor (TI) – Low Power Hex ECL-to-TTL Translator
Test Circuits (Continued)
Note:
• VCC = 0V, VEE = −4.5V, VTTL = +5V
• L1 and L2 = equal length 50Ω impedance lines
• RT = 50Ω terminator internal to scope
• Decoupling 0.1 µF from GND to VCC, VEE and VTTL
• All unused outputs are loaded with 500Ω to GND
• CL = Fixture and stray capacitance = 50 pF
FIGURE 3. AC Test Circuit for 50 pF Loading
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