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GTLP8T306 Datasheet, PDF (6/7 Pages) Fairchild Semiconductor – 8-Bit LVTTL/GTLP Bus Transceiver
Test Circuit and Timing Waveforms
Test Circuit for A Outputs
Test Circuit for B Outputs
Voltage Waveforms Pulse Duration
(VM = VCC/2 for A-Port and 1.0 for B-Port)
Voltage Waveforms Enable and Disable Times
A-Port
Voltage Waveforms Propagation Delay and Setup and Hold Times
(VM = VCC/2 for A-Port and 1.0 for B-Port)
Note A: CL includes probes and Jig capacitance.
Note B: For B-Port, CL = 30 pF is used for worst case.
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