FSB50250AS Datasheet, PDF (6/11 Pages) Fairchild Semiconductor – Smart Power Module (SPM®)

These values depend on PWM
control algorithm
15 V
Line
C₁ * Example circuit : V phase
R₅
C₅
VCC VB
HIN HO
LIN
VS
COM LO
Vts
V_DC
P
HIN LIN Output
Note
Inverter
0
0
V
Output
0
1
Z
Both FRFET Off
0
Low side FRFET On
C₃
1
0
VDC
High side FRFET On
1
1 Forbidden
Shoot through
N
R₃
Open Open
Z
Same as (0,0)
10mF
C₂
C₄
One Leg Diagram of SPM
* Example of bootstrap param: ters
C₁= C₂ =1mF ceramic capacitor
Note:
1. Parameters for bootsrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching frequency, typical example of parameters is shown above.
2. RC coupling(R₅ and C₅) and C₄ at each input of SPM^® and Micom (indicated as dotted lines) may be used to prevent improper signal due to surge noise. Signal input of SPM^®
is compatible with standard CMOS or LSTTL outputs.
3. Bold lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the reduction of surge voltage. Bypass capacitors such as C₁, C₂
and C₃ should have good high-frequencycharacteristics to absorb high-frequency ripple current.
Figure 3. Recommended CPU Interface and Bootstrap Circuit with Parameters
Note:
Attach the thermocouple on top of the heatsink-side of SPM^® (between SPM^® and heatsink if applied) to get the correct temperature measurement.
Figure 4. Case Temperature Measurement
3.5
3.0
2.5
2.0
1.5
1.0
0.5
20
40
60
80
100
120
140
160
THVIC [deg]
Figure 5. Temperature profile of Vts(typ.)
6
FSB50250AS Rev. A
www.fairchildsemi.com