FDMF6704A_09 Datasheet, PDF (6/14 Pages) Fairchild Semiconductor – The Xtra Small, High Performance, High Frequency DrMOS Module

Timing Diagrams
PWM
GL
GH to VSWH
VSWH
t_PDLL
t_DTHH
t_PDHL
Timeout
t_DTLH
Figure 4. Timing Diagram
Switch Node Ringing Suppression
Fairchild's DrMOS products have proprietary feature* that minimizes the peak overshoot and ringing voltage on the switch node
(VSWH) output, without the need of external snubbers. The following pictures show the waveforms of an FDMF6704 DrMOS part and
a competitor's part tested without snubbing. The tests were done in the same test circuit, under the same operating conditions.
Figure 5. FDMF6704
* Patent Pending
Figure 6. Competitor Part
6
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FDMF6704A Rev. F