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FDMF5822DCCT-ND Datasheet, PDF (6/25 Pages) Fairchild Semiconductor – FDMF5822DC-Smart Power Stage (SPS) Module with Integrated Thermal Warning and Thermal Shutdown
Electrical Characteristics
Typical value is under VIN=12 V, VCC=PVCC=5 V and TA=TJ=+ 25°C unless otherwise noted. Minimum / Maximum
values are under VIN=12 V, VCC=PVCC=5 V ± 10% and TJ=TA=-40 ~ 125°C unless otherwise noted.
Symbol
Parameter
Condition
Min. Typ.
GL Going LOW to GH Going HIGH, 10%
tD_DEADON LS Off to HS On Dead Time
GL to 10% GH, PWM Transition LOW to
10
HIGH – See Figure 27
GH Going LOW to GL Going HIGH, 10%
tD_DEADOFF HS Off to LS On Dead Time
GH to 10% GL, PWM Transition HIGH to
5
LOW – See Figure 27
tR_GH_20A GH Rise Time under 20 A IOUT 10% GH to 90% GH, IOUT=20 A
9
tF_GH_20A GH Fall Time under 20 A IOUT
90% GH to 10% GH, IOUT=20 A
9
tR_GL_20A
GL Rise Time under 20 A IOUT
10% GL to 90% GL, IOUT=20 A
9
tF_GL_20A GL Fall Time under 20 A IOUT
90% GL to 10% GL, IOUT=20 A
6
tPD_TSGHH
Exiting 3-State Propagation
Delay
PWM (from 3-State) Going HIGH to GH
Going HIGH, VIH_PWM to 10% GH
tPD_TSGLH
Exiting 3-State Propagation
Delay
PWM (from 3-State) Going LOW to GL
Going HIGH, VIL_PWM to 10% GL
High-Side Driver (HDRV, VCC = PVCC = 5 V)
RSOURCE_GH Output Impedance, Sourcing
RSINK_GH Output Impedance, Sinking
tR_GH
GH Rise Time
tF_GH
GH Fall Time
Source Current=100 mA
Sink Current=100 mA
10% GH to 90% GH, CLOAD=1.3 nF
90% GH to 10% GH, CLOAD=1.3 nF
0.68
0.9
4
3
Weak Low-Side Driver (LDRV2 Only under CCM2 Mode Operation, VCC = PVCC = 5 V)
RSOURCE_GL Output Impedance, Sourcing
Source Current=100 mA
ISOURCE_GL Output Sourcing Peak Current GL=2.5 V
RSINK_GL Output Impedance, Sinking
Sink Current=100 mA
ISINK_GL
Output Sinking Peak Current
GL=2.5 V
0.82
2
0.86
2
Low-Side Driver (Paralleled LDRV1 + LDRV2 under CCM1 Mode Operation, VCC = PVCC = 5 V)
RSOURCE_GL Output Impedance, Sourcing
Source Current=100 mA
0.47
ISOURCE_GL Output Sourcing Peak Current GL=2.5 V
4
RSINK_GL Output Impedance, Sinking
Sink Current=100 mA
0.29
ISINK_GL
Output Sinking Peak Current
GL=2.5 V
7
tR_GL
GL Rise Time
10% GL to 90% GL, CLOAD=7.0 nF
9
tF_GL
GL Fall Time
90% GL to 10% GL, CLOAD=7.0 nF
6
Thermal Warning Flag (125°C)
TACT_THWN_125 Activation Temperature
TRST_THWN_125 Reset Temperature
Measured on the driver IC with TJ=TA
125
110
RPLD_THWN Pull-Down Resistance
IPLD_THWN=1 mA
100
Thermal Shutdown (150°C)
TACT_THDN Activation Temperature
Measured on the driver IC with TJ=TA
150
RPLD_EN-THDN Pull-Down Resistance
IPLD_EN-THDN=1 mA
50
Catastrophic Fault (SW Monitor)
VSW_MON SW Monitor Reference Voltage
1.3
tD_FAULT
Propagation Delay to Pull EN /
FAULT# Signal = LOW
20
Max.
45
45
2
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Ω
Ω
ns
ns
Ω
A
Ω
A
Ω
A
Ω
A
ns
ns
°C
°C
Ω
°C
Ω
V
ns
Boot Diode
VF
Forward-Voltage Drop
IF=10 mA
VR
Breakdown Voltage
IR=1 mA
Note:
6. GH = Gate High, internal gate pin of the high-side MOSFET.
0.4
V
30
V
© 2013 Fairchild Semiconductor Corporation
FDMF5822DC • Rev. 1.0.1
6
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