FAN5608_06 Datasheet, PDF (6/13 Pages) Fairchild Semiconductor – Serial / Parallel LED Driver with Current-Regulated, Step-Up DC/DC Converter

Digital Static Control
The FAN5608’s digital decoder allows selection of the
following modes of operation: OFF, 5mA, 10mA, and
20mA per channel.
A
0
1
0
1
B
0
0
1
1
I_LED
OFF
5mA 10mA 20mA
Analog Static Control
In Analog Mode, B1 and B2 inputs should be connected
to GND or “0” logic. A1 and A2 control the LED current
through an external resistor (R), as shown in Figure 4, or
an external voltage (V_EXT) input.
The I_LED value can be calculated using the formula or
the graph below:
EQ 2
where 1.2V < V_EXT ≤ R(kΩ) x 0.020(mA) + 1.2V and the
current multiplication ratio is according to the Electrical
Specifications table. The R value should be in the (10kΩ
to 50kΩ) range.
25
R=10 k
20
15
10
R=50k
5
0
1.0 1.25 1.5 1.75 2
V_{EXT (V)}
Figure 7. Analog Control
2.25
PWM Control in Digital Dynamic Mode
In Digital Dynamic Mode, if inputs A1 and/or A2 are
externally driven by an open-drain output, the pull-up
resistance should be less than 10kΩ to ensure less than
0.7V dropout; VA > (V_IN – 0.7V), as required for HIGH logic
level.
The logic level HIGH (VH) and logic level LOW (VL) of
the PWM signal should be:
(V_IN – 0.7V) < VH < V_IN
and
EQ 3
0 < VL < 0.6V.
EQ 4
The frequency of the PWM signal should be within the
50Hz to 1kHz range, by default, or 30kHz at any input if
the other input is kept HIGH.
PWM Control in Analog Dynamic Mode
In Analog Dynamic Mode, the logic level HIGH (VH) and
logic level LOW (VL) of the PWM signal should be:
VH = V_EXT and 0 < VL < 0.6V.
EQ 5
The frequency of the PWM signal should be in the range
from 50Hz to 1kHz. The V_EXT amplitude sets the
maximum LED current, while the duty cycle of the PWM
signal sets the average current between 0mA and I_LED
maximum.
Open-Circuit Protection
The FAN5608 has an internal over-voltage protection
mechanism that prevents damage to the IC in a no-load
condition. If CH1 and/or CH2 LEDs are enabled in an
open-circuit condition, FAN5608 automatically sets the
duty cycle to 25%. The output voltage can reach as high
as 50V at maximum V_IN (5.5V). Depending on the
capacitor’s rating, the output capacitor may be at risk in
this condition.
Shutdown Mode
Each channel can be independently disabled by
applying LOW logic level voltage to the appropriate A
and B inputs. When both channels are disabled, the
FAN5608 enters shutdown mode and the supply current
is reduced to less than 1μA.
© 2006 Fairchild Semiconductor Corporation
FAN5608 Rev. 1.0.5 • 8/8/06
6
www.fairchildsemi.com