CD4029BC Datasheet, PDF (6/8 Pages) Fairchild Semiconductor – Presettable Binary/Decade Up/Down Counter

Switching Time Waveforms
Cascading Packages
Parallel Clocking
Ripple Clocking
Carry out lines at the 2nd or later stages may have a negative-going spike due to differential internal delays. These spikes
do not affect counter operation, but if the carry out is used to trigger external circuitry the carry out should be gated with the
clock.
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