NC7SZ125FHX Datasheet, PDF (5/10 Pages) Fairchild Semiconductor – TinyLogic UHS Buffer with Three-State Output

AC Electrical Characteristics
Symbol
Parameter
V_CC
Conditions
T_A=+25°C
T_A=-40 to +85°C _{Units Figure}
Min. Typ. Max. Min. Max.
1.65
2.0 6.4 13.2 2.0
13.8
t_PLH,t_PHL Propagation Delay
1.80
2.50 ±0.20
3.30 ±0.30
5.00 ±0.50
C_L=15 pF,
R_D=1 M
S₁=OPEN
2.0 5.3 11.0 2.0
0.8 3.4 7.5
0.8
0.5 2.5 5.2
0.5
0.5 2.1 4.5
0.5
11.5
8.0
5.5
4.8
ns
Figure 4
Figure 6
3.30 ±0.30 C_L=50 pF,
5.00 ±0.50
R_D=500 
S₁=OPEN
1.5 3.2 5.7
1.5
0.8 2.6 5.0
0.8
1.65 C_L=50 pF,
2.0 8.4 15.0 2.0
1.80
R_D=500 
2.0 7.0 12.5 2.0
t_PZL,t_PZH Output Enable Time
2.50 ±0.20 ^{RU=500 ï€} 
3.30 ±0.30
S₁=GND for t_PZH
S₁=V_IN for t_PZL
1.5
1.5
4.6
3.5
8.5
6.2
1.5
1.5
5.00 ±0.50 V_IN=2•V_CC
0.8 2.8 5.5
0.8
1.65 C_L=50 pF,
2.0 6.5 13.2 2.0
1.80
R_D=500 
2.0 5.4 11.0 2.0
t_PLZ,t_PHZ Output Disable Time
2.50 ±0.20 ^{RU=500 ï€} 
3.30 ±0.30
S₁=GND for t_PHZ
S₁=V_IN for t_PLZ
1.5
1.0
3.5
2.8
8.0
5.7
1.5
1.0
5.00 ±0.50 V_IN=2•V_CC
0.5 2.1 4.7
0.5
C_IN Input Capacitance
0.00
4
C_OUT Output Capacitance
0.00
8
C_PD
Power Dissipation
Capacitance⁽²⁾
3.30
5.00
17
24
6.0
5.3
15.6
13.0
9.0
6.5
5.8
14.5
ns
Figure 4
Figure 6
12.0
8.5
6.0
5.0
pF
pF Figure 5
Note:
2. C_PD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating
current consumption (I_CCD) at no output lading and operating at 50% duty cycle. C_PD is related to I_CCD dynamic
operating current by the expression: I_CCD=(C_PD)(V_CC)(f_IN)+(I_CCstatic).
Note:
3. C_L includes load and stray capacitance.
Input PRR=1.0 MHz, t_W=500 ns.
Figure 4. AC Test Circuit
Note:
4. Input=AC Waveform; t_r=t_f=1.8 ns;
PRR=10 MHz; Duty Cycle=50%.
Figure 5. I_CCD Test Circuit
© 1996 Fairchild Semiconductor Corporation
NC7SZ125 • Rev. 1.0.5
Figure 6. AC Waveforms
www.fairchildsemi.com
5