NC7SP74 Datasheet, PDF (5/11 Pages) Fairchild Semiconductor – TinyLogic ULP D-Type Flip-Flop with Preset and Clear

AC Electrical Characteristics (10pF, 1MΩ)
Symbol
Parameter
f_MAX
Maximum Clock
Frequency
t_PLH
Propagation Delay
t_PHL
CK to Q, Q
t_PLH
Propagation Delay
t_PHL
CLR, PR, to Q, Q
t_S
Setup Time,
CK to D
t_H
Hold Time,
CK to D
t_W
Pulse Width,
CK, PR, CLR
t_REC
Recover Time
CLR, PR to CK
V_CC
(V)
0.90
1.10 ≤ V_CC ≤ 1.30
1.40 ≤ V_CC ≤ 1.60
1.65 ≤ V_CC ≤ 1.95
2.30 ≤ V_CC ≤ 2.70
3.00 ≤ V_CC ≤ 3.60
0.90
1.10 ≤ V_CC ≤ 1.30
1.40 ≤ V_CC ≤ 1.60
1.65 ≤ V_CC ≤ 1.95
2.30 ≤ V_CC ≤ 2.70
3.00 ≤ V_CC ≤ 3.60
0.90
1.10 ≤ V_CC ≤ 1.30
1.40 ≤ V_CC ≤ 1.60
1.65 ≤ V_CC ≤ 1.95
2.30 ≤ V_CC ≤ 2.70
3.00 ≤ V_CC ≤ 3.60
0.90
1.10 ≤ V_CC ≤ 1.30
1.40 ≤ V_CC ≤ 1.60
1.65 ≤ V_CC ≤ 1.95
2.30 ≤ V_CC ≤ 2.70
3.00 ≤ V_CC ≤ 3.60
0.90
1.10 ≤ V_CC ≤ 1.30
1.40 ≤ V_CC ≤ 1.60
1.65 ≤ V_CC ≤ 1.95
2.30 ≤ V_CC ≤ 2.70
3.00 ≤ V_CC ≤ 3.60
0.90
1.10 ≤ V_CC ≤ 1.30
1.40 ≤ V_CC ≤ 1.60
1.65 ≤ V_CC ≤ 1.95
2.30 ≤ V_CC ≤ 2.70
3.00 ≤ V_CC ≤ 3.60
0.90
1.10 ≤ V_CC ≤ 1.30
1.40 ≤ V_CC ≤ 1.60
1.65 ≤ V_CC ≤ 1.95
2.30 ≤ V_CC ≤ 2.70
3.00 ≤ V_CC ≤ 3.60
T_A = +25°C
Min
Typ
Max
40.0
50
75
100
125
150
24.0
4.0
15.0
22.0
2.0
9.0
13.0
1.5
7.0
11.0
1.0
5.0
8.0
1.0
4.0
7.0
6.5
4.0
12.0
23.0
2.0
9.0
12.0
1.5
7.0
11.0
1.0
5.0
9.0
1.0
4.0
7.0
10.0
7.0
3.0
2.0
1.5
1.0
1.0
0.5
0.5
0.5
0.5
0.5
5.0
5.0
3.0
2.5
2.5
2.0
12.0
8.5
3.5
3.0
2.5
2.0
T_A = −40°C to +85°C
Units
Min
Max
Conditions
50
75
MHz ^{CL = 10 pF}
100
R_D = 1 MΩ
125
150
3.5
31.0
1.5
14.0
ns ^{CL = 10 pF}
1.0
13.0
R_D = 1 MΩ
0.8
9.0
0.5
8.0
4.0
34.0
2.0
14.0
ns ^{CL = 10 pF}
1.5
13.0
R_D = 1 MΩ
1.0
9.0
1.0
8.0
7.0
3.0
ns ^{CL = 10 pF}
2.0
R_D = 1 MΩ
1.5
1.0
0.5
0.5
ns ^{CL = 10 pF}
0.5
R_D = 1 MΩ
0.5
0.5
5.0
3.0
ns ^{CL = 10 pF}
2.5
R_D = 1 MΩ
2.5
2.0
8.5
3.5
ns ^{CL = 10 pF}
3.0
R_D = 1 MΩ
2.5
2.0
Figure
Number
Figures
1, 5
Figures
1, 3
Figures
1, 3
Figures
1, 4
Figures
1, 4
Figures
1, 5
Figures
1, 4
5
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