FXLA108_12 Datasheet, PDF (5/17 Pages) Fairchild Semiconductor – Low-Voltage Dual-Supply 8-Bit Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing

Power-Up/Power-Down Sequence
FXL translators offer an advantage in that either V_CC
may be powered up first. This benefit derives from the
chip design. When either V_CC is at 0V, outputs are in a
high-impedance state. The control input (/OE) is
designed to track the V_CCA supply. A pull-up resistor
tying /OE to V_CCA should be used to ensure that bus
contention, excessive currents, or oscillations do not
occur during power-up or power-down. The size of the
pull-up resistor is based upon the current-sinking
capability of the device driving the /OE pin.
The recommended power-up sequence is:
1. Apply power to the first V_CC.
2. Apply power to the second V_CC.
3. Drive the /OE input LOW to enable the device.
The recommended power-down sequence is:
1. Drive /OE input HIGH to disable the device.
2. Remove power from either V_CC.
3. Remove power from other V_CC.
Pull-Up/Pull-Down Resistors
Do not use pull-up or pull-down resistors. This device
has bus-hold circuits: pull-up or pull-down resistors are
not recommended because they interfere with the output
state. The current through these resistors may exceed
the hold drive, I_I(HOLD) and/or I_I(OD) bus-hold currents. The
bus-hold feature eliminates the need for extra resistors.
© 2009 Fairchild Semiconductor Corporation
FXLA108 • Rev. 1.0.5
5
www.fairchildsemi.com