FOD3180 Datasheet, PDF (5/13 Pages) Fairchild Semiconductor – 2A Output Current, High Speed MOSFET Gate Driver Optocoupler

Notes:
1. Derate linearly above +70°C free air temperature at a rate of 0.3mA/°C.
2. The output currents I_OH and I_OL are specified with a capacitive current limited load = (3 x 0.01µF) + 0.5Ω,
frequency = 8kHz, 50% DF. The maximum pulse width of the output current is 300ns, maximum duty cycle = 0.48%.
Output currents specified for different values of V_DS for V_CC – V_EE = 20V with the formula:
V_OH = (V_CC – V_EE) – (I_OH x R_DS(ON)).
This guarantees operation at I_O peak minimum = 2.0A for -40°C to +100°C operating temperature range.
3. The output currents I_OH and I_OL are specified with a capacitive current limited load = (3 x 0.01µF) + 8.5Ω,
frequency = 8kHz, 50% DF. The maximum pulse width of the output current is 1.5µs, maximum duty cycle = 2.4%.
Output currents specified for different values of V_DS for V_CC – V_EE = 20V with the formula:
V_OL = (V_CC – V_EE) – (I_OL x R_DS(ON)).
This guarantees operation at I_O peak minimum = 0.5A for -40°C to +100°C operating temperature range.
4. Derate linearly above +87°C, free air temperature at the rate of 0.77mW/°C. Refer to Figure 12.
5. No derating required across operating temperature range.
6. In this test, V_OH is measured with a dc load current. When driving capacitive load V_OH will approach V_CC as I_OH
approaches zero amps.
7. Maximum pulse width = 1ms, maximum duty cycle = 20%.
8. t_PHL propagation delay is measured from the 50% level on the falling edge of the input pulse to the 50% level of the
falling edge of the V_O signal. t_PLH propagation delay is measured from the 50% level on the rising edge of the input
pulse to the 50% level of the rising edge of the V_O signal.
9. PWD is defined as | t_PHL – t_PLH | for any given device.
10. The difference between t_PHL and t_PLH between any two FOD3180 parts under same test conditions.
11. Pin 1 and 4 need to be connected to LED common.
12. Common mode transient immunity in the high state is the maximum tolerable dV_CM/dt of the common mode pulse
V_CM to assure that the output will remain in the high state (i.e. V_O > 10.0V).
13. Common mode transient immunity in a low state is the maximum tolerable dV_CM/dt of the common mode pulse,
V_CM, to assure that the output will remain in a low state (i.e. V_O < 1.0V).
14. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage > 6000Vrms for
1 second (leakage detection current limit I_I-O < 5µA).
15. Device considered a two-terminal device: pins on input side shorted together and pins on output side shorted
together.
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FOD3180 Rev. 1.0.3