SPT7852 Datasheet, PDF (4/11 Pages) Fairchild Semiconductor – DUAL 10-BIT, 20 MSPS, 160 mW A/D CONVERTER

Figure 1 –Typical Interface Circuit
+A5
+A5 ^{3-st EN}
Ref In
(+4 V)
V_IN1
V_IN2
Clock
V_RHF
V_RHS
MSBINV Reset
EN
Digital ¹¹
Output A
V_RLS
V_RLF
V_CAL
V_INA
V_INB
SPT7852
DAV
Digital ¹¹
Output B
CLK
AV_DD DV_DD
GND
OV_DD
.1 µF .1 µF
FB
*
4.7 µF 4.7 µF
FB
*
+A5
Interfacing
Logic
3.3 V/5 V
1. Place the ferrite bead (*) as close to the ADC as possible.
2. Place 0.1 µF decoupling capacitors as close to the ADC as possible.
3. All capacitors are 0.1 µF surface-mount unless otherwise specified.
4. All analog input pins (references, analog input, clock input) must
be protected. (See absolute maximum ratings.)
TYPICAL INTERFACE CIRCUIT
Very few external components are required to achieve the
stated device performance. Figure 1 shows the typical inter-
face requirements when using the SPT7852 in normal
circuit operation. The following sections provide descrip-
tions of the major functions and outline critical performance
criteria to consider for achieving the optimal device perfor-
mance.
POWER SUPPLIES AND GROUNDING
Fairchild suggests that both the digital and the analog sup-
ply voltages on the SPT7852 be derived from a single ana-
log supply as shown in figure 1. A separate digital supply
must be used for all interface circuitry. Fairchild suggests
using this power supply configuration to prevent a possible
latch-up condition on powerup.
SPT7852
4
1/12/00