HUF76633P3 Datasheet, PDF (4/10 Pages) Fairchild Semiconductor – 38A, 100V, 0.036 Ohm, N-Channel, Logic Level UltraFET Power MOSFET

HUF76633P3, HUF76633S3S
Typical Performance Curves (Continued)
200
100
100µs
10
OPERATION IN THIS
AREA MAY BE
LIMITED BY r_DS(ON)
1ms
T_C = 25^oC
1
1
SINGLE PULSE
T_J = MAX RATED
10
10ms
100
300
V_DS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
500
If R = 0
t_AV = (L)(I_AS)/(1.3*RATED BV_DSS - V_DD)
If R ≠ 0
100 ^{tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1]}
STARTING T_J = 25^oC
10
STARTING T_J = 150^oC
1
0.001
0.01
0.1
1
10
t_AV, TIME IN AVALANCHE (ms)
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
80
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V_DD = 15V
60
80
V_GS = 10V
V_GS = 5V
60
V_GS = 4V
V_GS = 3.5V
40
20
T_J = 175^oC
T_J = 25^oC
0
T_J = -55^oC
1.5
2.0
2.5
3.0
3.5
4.0
V_GS, GATE TO SOURCE VOLTAGE (V)
FIGURE 7. TRANSFER CHARACTERISTICS
40
V_GS = 3V
20
0
0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
T_C = 25^oC
1
2
3
4
5
V_DS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 8. SATURATION CHARACTERISTICS
50
I_D = 39A
45
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
T_C = 25^oC
40
35
I_D = 15A
30
I_D = 27A
25
2
4
6
8
10
V_GS, GATE TO SOURCE VOLTAGE (V)
FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
3.0
V_GS = 10V, I_D = 39A
PULSE DURATION = 80µs
2.5 _{DUTY CYCLE = 0.5% MAX}
2.0
1.5
1.0
0.5
-80
-40
0
40
80 120 160 200
T_J, JUNCTION TEMPERATURE (^oC)
FIGURE 10. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
©2001 Fairchild Semiconductor Corporation
HUF76633P3, HUF76633S3S Rev. B