HCPL-0600 Datasheet, PDF (4/12 Pages) Fairchild Semiconductor – HIGH SPEED-10 MBit/s LOGIC GATE OPTOCOUPLERS

HIGH SPEED-10 MBit/s
LOGIC GATE OPTOCOUPLERS
HCPL-0600
HCPL-0601
TRANSFER CHARACTERISTICS (T_A = -40°C to +85°C Unless otherwise specified.)
DC Characteristics
Test Conditions Symbol
Min
Typ**
Max
Unit
High Level Output Current
Low Level Output Voltage
Input Threshold Current
(V_CC = 5.5 V, V_O = 5.5 V)
(I_F = 250 µA, V_E = 2.0 V) (Note 2)
I_OH
(V_CC = 5.5 V, I_F = 5 mA)
(V_E = 2.0 V, I_OL = 13 mA) (Note 2)
V_OL
(V_CC = 5.5 V, V_O = 0.6 V,
V_E = 2.0 V, I_OL = 13 mA)
I_FT
100
µA
.35
0.6
V
3
5
mA
ISOLATION CHARACTERISTICS (T_A = -40°C to +85°C Unless otherwise specified.)
Characteristics
Test Conditions Symbol Min
Typ**
Max
Unit
Input-Output
Insulation Leakage Current
(Relative humidity = 45%)
(T_A = 25°C, t = 5 s)
(V_I-O = 3000 VDC)
I_I-O
(Note 11)
1.0*
µA
Withstand Insulation Test Voltage
(R_H < 50%, T_A = 25°C)
(Note 11) ( t = 1 min.)
Resistance (Input to Output)
Capacitance (Input to Output)
(V_I-O = 500 V) (Note 11)
(f = 1 MHz) (Note 11)
** All typical values are at V_CC = 5 V, T_A = 25°C
V_ISO
R_I-O
C_I-O
2500
10¹²
0.6
V_RMS
Ω
pF
NOTES
1. The V_CC supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic or solid
tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package V_CC
and GND pins of each device.
2. Enable Input - No pull up resistor required as the device has an internal pull up resistor.
3. t_PLH - Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the
1.5V level on the LOW to HIGH transition of the output voltage pulse.
4. t_PHL - Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the
1.5V level on the HIGH to LOW transition of the output voltage pulse.
5. t_r - Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
6. t_f - Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
7. t_ELH - Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input voltage pulse
to the 1.5V level on the LOW to HIGH transition of the output voltage pulse.
8. t_EHL - Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input voltage pulse
to the 1.5V level on the HIGH to LOW transition of the output voltage pulse.
9. CM_H - The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e.,
V_OUT > 2.0 V). Measured in volts per microsecond (V/µs).
10. CM_L - The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low output state
(i.e., V_OUT < 0.8 V). Measured in volts per microsecond (V/µs).
11. Device considered a two-terminal device: Pins 1,2,3 and 4 shorted together, and Pins 5,6,7 and 8 shorted together.
© 2003 Fairchild Semiconductor Corporation
Page 4 of 12
4/10/03