FODM611 Datasheet, PDF (4/12 Pages) Fairchild Semiconductor – High Noise Immunity, 5V, 10Mbit/sec Logic Gate Output (Open Collector) Optocoupler

Electrical Characteristics (Apply over all recommended conditions)
(T_A = -40ºC to +85ºC, 4.5V ≤ V_CC ≤ 5.5V), unless otherwise specified.
Typical value is measured at T_A = 25ºC and V_CC = 5.0V.
Symbol
Parameter
Test Conditions
INPUT CHARACTERISTICS
V_F Forward Voltage
BV_R Input Reverse Breakdown Voltage
I_FHL Threshold Input Current
OUTPUT CHARACTERISTICS
V_OL Logic LOW Output Voltage
I_OH Logic HIGH Output Current
I_CCL Logic LOW Output Supply Current
I_F = 10mA, Fig. 1
I_R = 10µA
V_O = 0.6V, I_OL(sinking) = 13mA,
T_A < 85ºC, Fig. 2
I_F = rated I_FHL,
I_OL(sinking) = 13mA, Fig. 3
I_F = 250µA, V_O = 5.0V, Fig. 4
I_F = 10mA, V_CC = 5.0V, Fig. 5, 7
I_CCH Logic HIGH Output Supply Current I_F = 0mA, V_CC = 5.0V, Fig. 6, 7
Min. Typ. Max. Units
1.05 1.45 1.8
V
5.0
V
3.4 5.0 mA
0.4 0.6
V
2.1 30.0 µA
7.5 10.0 mA
6.0 9.0 mA
Switching Characteristics (Apply over all recommended conditions)
(T_A = -40ºC to +85ºC, 4.5V ≤ V_CC ≤ 5.5V, I_F = 7.5mA), unless otherwise specified.
Typical value is measured at T_A = 25ºC and V_CC = 5.0V
Symbol
Parameter
Test Conditions
Min.
Date Rate
R_L = 350Ω
t_PHL
Propagation Delay Time to Logic R_L = 350Ω, C_L = 15pF,
Low Output
Fig. 8 and 11
t_PLH
Propagation Delay Time to Logic R_L = 350Ω, C_L = 15pF,
High Output
Fig. 8 and 11
PWD
t_PSK
Pulse Width Distortion,
| t_PHL – t_PLH |
Propagation Delay Skew
R_L = 350Ω, C_L = 15pF,
Fig. 9
R_L = 350Ω, C_L = 15pF⁽⁶⁾
Typ.
43
50
7
Max.
10
100
Units
Mbps
ns
100
ns
35
ns
40
ns
t_R
Output Rise Time, (10% to 90%) R_L = 350Ω, C_L = 15pF,
20
ns
Fig. 10 and 11
t_F
Output Fall Time, (90% to 10%) R_L = 350Ω, C_L = 15pF,
10
ns
Fig. 10 and 11
|CM_H|
|CM_L|
Common Mode Transient
Immunity at Output High
Common Mode Transient
Immunity at Output Low
V_I = 5.0V, V_O > 0.8 x V_CC,
20
40
V_CM = 1000V⁽⁷⁾, Fig. 12
V_I = 0V, V_O < 0.8V,
20
40
V_CM = 1000V⁽⁷⁾, Fig. 12
kV/µs
kV/µs
Notes
6. t_PSK is equal to the magnitude of the worst case difference in t_PHL and/or t_PLH that will be seen between any two units
from the same manufacturing date code that are operated at same case temperature (±5°C), at same operating
conditions, with equal loads (R_L = 350Ω and C_L = 15pF), and with an input rise time less than 5ns.
7. Common mode transient immunity at output high is the maximum tolerable positive dVcm/dt on the leading edge of
the common mode impulse signal, Vcm, to assure that the output will remain high. Common mode transient immunity
at output low is the maximum tolerable negative dVcm/dt on the trailing edge of the common pulse signal, Vcm, to
assure that the output will remain low.
©2009 Fairchild Semiconductor Corporation
FODM611 Rev. 1.0.1
4
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