FOD0721_10 Datasheet, PDF (4/12 Pages) Fairchild Semiconductor – High CMR, 25Mbit/sec Logic Gate Optocoupler

Switching Characteristics (T_A = -40°C to 100°C and 4.5V ≤ V_DD ≤ 5.5V, all typicals are at T_A = 25°C, V_DD = 5V)
Symbol Parameter
Test Conditions Min. Typ. Max. Unit
t_PHL Propagation Delay Time to
Logic Low Output
C_L = 15pF
21
40
ns
t_PLH Propagation Delay Time to
Logic High Output
C_L = 15pF
23
40
ns
PWD
Data Rate
Pulse Width Distortion, | t_PHL – t_PLH |
FOD0710
PW = 80ns, C_L = 15pF
FOD0720
PW = 40ns, C_L = 15pF
FOD0721
PW = 40ns, C_L = 15pF
FOD0710
2
8
ns
2
8
ns
2
6
ns
12.5
Mb/s
FOD0720, FOD0721
25
Mb/s
t_PSK Propagation Delay Skew
C_L = 15pF⁽³⁾
20
ns
t_R
Output Rise Time (10%–90%)
5
ns
t_F
Output Fall Time (90%–10%)
4.5
ns
|CM_H| Common Mode Transient
V_I = V_DD1, V_O > 0.8 V_DD2
20
40
Immunity at Output High
V_CM = 1000V⁽⁴⁾
kV/µs
|CM_L| Common Mode Transient
Immunity at Output Low
V_I = 0V, V_O < 0.8,
V_CM = 1000V⁽⁴⁾
20
40
kV/µs
Notes:
3. t_PSK is equal to the magnitude of the worst case difference in t_PHL and/or t_PLH that will be seen between units at any given
temperature within the recommended operating conditions.
4. Common mode transient immunity at output high is the maximum tolerable (positive) dVcm/dt on the leading edge
of the common mode impulse signal. Vcm, to assure that the output will remain high. Common mode transient
immunity at output low is the maximum tolerable (negative dVcm/dt on the trailing edge of the common pulse
signal, Vcm, to assure that the output will remain low.
©2004 Fairchild Semiconductor Corporation
FOD0721, FOD0720, FOD0710 Rev. 1.0.9
4
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