FAN6103 Datasheet, PDF (4/13 Pages) Fairchild Semiconductor – Power Supply Supervisor Plus PWM

Pin Configuration
Figure 4. Pin Configuration
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Name
PSON
V33
V5
OPP
UVAC
NVP
V12
OP2
OP1
PG
GND
COMP
IN
SS
RI
VCC
Description
Remote on/off logic input. Turn on/off the PWM output after the 16ms / 50ms delay.
PSON = 0 means that the main SMPS is operational.
PSON = 1 means that the main SMPS is off and the latch is reset.
3.3V over-voltage/under-voltage control sense input.
5V over-voltage/under-voltage control sense input.
Over-power sense input. This pin is connected to driver transformer or the output of current
transformer. When not in use, this pin should be grounded.
AC-fail detection. Detect main AC voltage under-voltage or failure.
The protection input for negative output, such as –12V and/or –5V; trip voltage = 2.1V.
12V over-voltage/under-voltage control sense input.
The totem-pole output drivers of push-pull PWM. The output are enabled (LOW) only when
the NAND gate inputs are HIGH; the maximum duty cycle on output OP2 is 46%.
The totem-pole output drivers of push-pull PWM. The output are enabled (LOW) only when
the NAND gate inputs are HIGH the maximum duty cycle on output OP1 is 46%.
Power-good logic output, 0 or 1 (open-collector). PG = 1 means that the power is ready for
operation. The PG delay is 300ms.
Ground.
Error amplifier output and the input of the PWM comparator.
The negative input of error amplifier. The positive input of error amplifier is a 2.5V reference
voltage.
The soft-start, it is settable through an external capacitor. The current source output at this pin
is 8µA and the voltage is clamped at 2.5V.
Reference Resistor. Connected to external resistor for the reference setting.
Supply voltage; 4.5V ~ 5.5V, connected to 5V standby.
© 2009 Fairchild Semiconductor Corporation
FAN6103 • Rev. 1.0.0
4
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