TMC2193 Datasheet, PDF (37/72 Pages) Fairchild Semiconductor – 10 Bit Encoder

PRODUCT SPECIFICATION
Table 26. Control Register Map (continued)
Reg Bit
3C 7-4
3C 3
3C 2-0
3D 7-4
3D 3-0
3E 7-4
3E 3-0
3F 7
3F 6
3F 5
3F 4
3F 3
3F 2
3F 1-0
40 7-0
41 7-0
Mnemonic Function
MCF5M
Matrix Coefficient #5
Reserved
Set to 0.
MCF6M
Matrix Coefficient #6
MCF7M
Matrix Coefficient #7
MCF8M
Matrix Coefficient #8
MCF9M
Matrix Coefficient #9
MCF10M
Matrix Coefficient #10
SEL_CLK
DCVBS Clock Select
RGB_CLIP RGB Limit Control
GAUSS_BVP Gaussian Bypass Select
SEL_PIX
DCVBS Output Selection
C2DB_OFF COMP2DB Offset Selection
NMEH
NTSC-M Component
Enhancement
CSMFMT
Color Space Matrix
Configuration
Subcarrier Registers
FREQL
Subcarrier Frequency
FREQ3
Subcarrier Frequency
TMC2193
Table 26. Control Register Map (continued)
Reg Bit
42 7-0
43 7-0
44 7-0
45 7-0
46 7-0
47 7-0
48 7-0
49 7-0
4A 7-0
4B 7
4B 6-0
Mnemonic Function
FREQ2
Subcarrier Frequency
FREQM
Subcarrier Frequency
SYSPHL
System Phase
SYSPHM
System Phase
BURPHL
Burst Phase
BURPHM
Burst Phase
BRSTFULL
Burst Height – Maximum
Amplitude
BRST1
Burst Height – 1st Intermediate
Value
BRST2
Burst Height – 2nd Intermediate
Value
Pedestal Height Register
NBMD
Component Blank and Sync
Level Selection
PEDHGT2 Component Pedestal Height
Note:
1. For each register listed above, all bits not specified are
reserved and should be set to logic LOW to ensure proper
operation.
Control Register Definitions
Part Identification Register (0x00)
7
6
5
4
3
2
1
0
PARTID2
Reg Bit
00 7-0
Name
PARTID2
Description
(Read Only) 0x97
Part Identification Register (0x01)
7
6
5
4
3
2
1
0
PARTID1
Reg Bit
01 7-0
Name
PARTID1
Description
(Read Only) 0x21
REV. 1.0 3/26/03
37