FSB50450S_0705 Datasheet, PDF (3/8 Pages) Fairchild Semiconductor – Smart Power Module (SPM®)

Electrical Characteristics (T_J = 25°C, V_CC=V_BS=15V Unless Otherwise Specified)
Inverter Part (Each FRFET Unless Otherwise Specified)
Symbol
Parameter
Conditions
Min Typ Max Units
BV_DSS
Drain-Source
Voltage
Breakdown
V_IN= 0V, I_D = 250μA (Note 2)
500 -
-
V
ΔBV_DSS/
ΔT_J
I_DSS
Breakdown Voltage
perature Coefficient
Tem-
I_D = 250μA, Referenced to 25°C
Zero Gate Voltage
Drain Current
V_IN= 0V, V_DS = 500V
- 0.53 -
V
-
- 250 μA
R_DS(on)
Static Drain-Source
On-Resistance
V_CC = V_BS = 15V, V_IN = 5V, I_D = 1.0A
- 1.9 2.4
Ω
V_SD
Drain-Source Diode
Forward Voltage
V_CC = V_BS = 15V, V_IN = 0V, I_D = -1.0A
-
- 1.2
V
t_ON
t_OFF
t_rr
E_ON
E_OFF
Switching Times
V_PN = 300V, V_CC = V_BS = 15V, I_D = 1.0A
V_IN = 0V ↔ 5V
Inductive load L=3mH
High- and low-side FRFET switching
(Note 3)
- 1152 -
ns
- 600 -
ns
- 185 -
ns
-
85
-
μJ
-
11
-
μJ
RBSOA
Reverse-bias
ating Area
Safe
Oper-
V_PN = 400V, V_CC = V_BS = 15V, I_D = I_DP, V_DS=BV_DSS,
T_J = 150°C
High- and low-side FRFET switching (Note 4)
Full Square
Control Part (Each HVIC Unless Otherwise Specified)
Symbol
Parameter
Conditions
I_QCC
I_QBS
UV_CCD
UV_CCR
UV_BSD
UV_BSR
V_IH
V_IL
I_IH
I_IL
Quiescent V_CC Current
Quiescent V_BS Current
Low-side Undervoltage
Protection (Figure 6)
High-side Undervoltage
Protection (Figure 7)
ON Threshold Voltage
OFF Threshold Voltage
Input Bias Current
V_CC=15V, V_IN=0V Applied between V_CC and COM
V_BS=15V, V_IN=0V
Applied between V_B(U)-U,
V_B(V)-V, V_B(W)-W
V_CC Undervoltage Protection Detection Level
V_CC Undervoltage Protection Reset Level
V_BS Undervoltage Protection Detection Level
V_BS Undervoltage Protection Reset Level
Logic High Level
Applied between IN and COM
Logic Low Level
V_IN = 5V
V_IN = 0V
Applied between IN and COM
Min Typ Max Units
-
- 160 μA
-
- 100 μA
7.4 8.0 9.4
V
8.0 8.9 9.8
V
7.4 8.0 9.4
V
8.0 8.9 9.8
V
3.0 -
-
V
-
- 0.8
V
-
10 20
μA
-
-
2
μA
Note:
1. For the measurement point of case temperature T_C, please refer to Figure 3 in page 4.
2. BV_DSS is the absolute maximum voltage rating between drain and source terminal of each FRFET inside SPM^®. V_PN should be sufficiently less than this value considering the
effect of the stray inductance so that V_DS should not exceed BV_DSS in any case.
3. t_ON and t_OFF include the propagation delay time of the internal drive IC. Listed values are measured at the laboratory test condition, and they can be different according to the
field applcations due to the effect of different printed circuit boards and wirings. Please see Figure 4 for the switching time definition with the switching test circuit of Figure 5.
4. The peak current and voltage of each FRFET during the switching operation should be included in the safe operating area (SOA). Please see Figure 5 for the RBSOA test cir-
cuit that is same as the switching test circuit.
Package Marking & Ordering Information
Device Marking
FSB50450S
Device
FSB50450S
Package
SPM23BA
Reel Size
330mm
Packing Type
Tape & reel
Quantity
450
FSB50450S Rev. B
3
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