FOD0708 Datasheet, PDF (3/11 Pages) Fairchild Semiconductor – Optocouplers consist of an AlGaAs LED optically coupled to a high speed trans-impedance amplifier and voltage comparator

Switching Characteristics Over recommended temperature (T_A = –40°C to +100°C) and
4.5 V ≤ V_DD ≤ 5.5 V. All typical specifications are at T_A = 25°C, V_DD = +5 V.
Symbol
Parameter
Test Conditions
Min. Typ.* Max. Units
t_PHL
Propagation Delay Time to I_F = 12 mA, C_L = 15 pF
20
Logic Low Output
CMOS Signal Levels, note 1, fig. 10
60
ns
t_PLH
Propagation Delay Time to I_F = 12 mA, C_L = 15 pF FOD0708
13
Logic High Output
CMOS Signal Levels, _FOD0738
11
note 1, fig. 10
60
ns
60
PW
Pulse Width
100
ns
| PWD | Pulse Width Distortion
I_F = 12 mA, C_L = 15 pF
0
30
ns
CMOS Signal Levels, note 2
t_PSK
Propagation Delay Skew
I_F = 12 mA, C_L = 15 pF
CMOS Signal Levels, note 3
40
ns
t_R
Output Rise Time (10%–90%) I_F = 12 mA, C_L = 15 pF
CMOS Signal Levels
12
ns
t_F
Output Fall Time (90%–10%) I_F = 12 mA, C_L = 15 pF
CMOS Signal Levels
8
ns
| CM_H |
Common Mode Transient
Immunity at Logic High
Output
V_CM = 1000 V, T_A = 25°C, I_F = 0 mA, 25
50
note 4, fig. 11
kV/µs
| CM_L | Common Mode Transient
V_CM = 1000 V, T_A = 25°C, I_F = 12 mA, 25
50
Immunity at Logic Low Output note 5, fig. 11
kV/µs
*All typicals at T_A = 25°C and V_DD = 5V unless otherwise noted.
Isolation Characteristics (T_A = -40°C to +100°C Unless otherwise specified.)
Characteristics
Test Conditions Symbol Min Typ.** Max Unit
Input-Output Insulation
Leakage Current
(Relative humidity = 45%)
I_I-O
(T_A = 25°C, t = 5 s)
(V_I-O = 3000 VDC) (Note 6)
1.0
µA
Withstand Insulation
Test Voltage
Resistance (Input to Output)
(I_I-O ≤ 10 µA, R_H < 50%,
T_A = 25°C) (t = 1 min.) (Note 6)
(V_I-O = 500 V) (Note 6)
V_ISO
R_I-O
2500
10¹²
V_RMS
Ω
Capacitance (Input to Output) (f = 1 MHz) (Note 6)
C_I-O
0.6
pF
** All typical values are at V_CC = 5 V, T_A = 25°C
Notes:
1. Propagation delay time, high to low (t_PHL), is measured from the 50% level on the rising edge of the input pulse to the 2.5V level
of the falling edge of the output voltage signal. Propagation delay time, low to high (t_PLH), is measured from the 50% level on the
falling edge of the input pulse to the 2.5V level of the rising edge of the output voltage signal.
2. Pulse width distoration is defined as the absolute difference between the high to low and low to high propagation delay times,
| t_PHL – t_PLH |.
3. Propagation delay skew, t_PSK, is defined as the worst case difference in t_PHL or t_PLH between units within the recommended
operating range of the device.
4. CM_H – The maximum tolerated rate of rise of the common mode voltage to ensure the output will remain in the high state,
(i,e., V_OUT > 2.0V) Measured in kilovolts per microsecond (kV/µs).
5. CM_L – The maximum tolerated rate of fall of the common mode voltage to ensure the output will remain in the low state,
(i,e., V_OUT < 0.8V). Measured in kilovolts per microsecond (kV/µs).
6. Isolation voltage, V_ISO, is an internal device dielectric breakdown rating. For this test, pins 1,2,3,4 are common, and pins 5,6,7,8
are common.
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FOD0708/FOD0738 Rev. 1.0.6
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