FDS8928A Datasheet, PDF (3/12 Pages) Fairchild Semiconductor – Dual N & P-Channel Enhancement Mode Field Effect Transistor

Electrical Characteristics (continued)
SWITCHING CHARACTERISTICS (Note 2)
Symbol Parameter
Conditions
Type Min Typ Max Units
t_D(on)
Turn - On Delay Time
t_r
Turn - On Rise Time
V_DS = 6 V, I _D = 1 A
V_GS = 4.5 V , R_GEN = 6 Ω
N-Ch
P-Ch
N-Ch
P-Ch
6
12
ns
8
16
19 31
ns
23 37
t_D(off)
Turn - Off Delay Time
t_f
Turn - Off Fall Time
V_DS= -10 V, I _D = -1 A
V_GS = -4.5 V , R_GEN = 6 Ω
N-Ch
P-Ch
N-Ch
P-Ch
42 67
ns
260 360
13 24
ns
90 125
Q_g
Total Gate Charge
Q_gs
Gate-Source Charge
Q_gd
Gate-Drain Charge
V_DS = 10 V, I _D = 5.5 A,
V_GS = 4.5 V
V_DS = -5 V, I _D = -4 A,
V_GS = -5 V
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
19.8 28 nC
20 28
2
nC
2.8
6.3
nC
3.2
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I_S
Maximum Continuous Drain-Source Diode Forward Current
N-Ch
P-Ch
1.3
A
-1.3 A
V_SD
Drain-Source Diode Forward Voltage
V_GS = 0 V, I_S = 1.3 A (Note 2)
N-Ch
0.68 1.2
V
V_GS = 0 V, I_S = -1.3 A (Note 2)
P-Ch
-0.7 -1.2 V
Notes:
1. R_θJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R_θJC is guaranteed by
design while R_θCA is determined by the user's board design.
a. 78^OC/W on a 0.5 in²
pad of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%..
b. 125^OC/W on a 0.02 in²
pad of 2oz copper.
c. 135^OC/W on a 0.003 in²
pad of 2oz copper.
FDS8928A Rev. B