FAN6751MR Datasheet, PDF (3/13 Pages) Fairchild Semiconductor – Highly-Integrated Green-Mode PWM Controller

Marking Information
ZXYTT
6751MR
TPM
Pin Configuration
F: Fairchild logo
Z: Plant code
X: 1 digit year code
Y: 1 digit week code
TT: 2 digits die run code
T: Package type (N:DIP, M:SOP)
P: Y=Green package
M: Manufacture flow code
Figure 3. Top Mark
SOP-8
GND 1
FB 2
NC 3
HV 4
8 GATE
7 VDD
6 SENSE
5 VIN
Figure 4. Pin Configuration (Top View)
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
Name
GND
FB
NC
HV
VIN
SENSE
VDD
GATE
Description
Ground.
The signal from the external compensation circuit is fed into this pin. The PWM duty cycle is
determined in response to the signal on this pin and the current-sense signal on the SENSE pin.
No connection.
For startup, this pin is pulled high to the line input or bulk capacitor via resistors.
Line-voltage detection. The line-voltage detection is used for brownout protection with
hysteresis. Constant output power limit over universal AC input range is also achieved using this
VIN pin. It is suggested to add a low pass filter to filter out line ripple on bulk capacitor. VIN
pulling high triggers latch protection.
Current sense. The sensed voltage is used for peak-current-mode control and cycle-by-cycle
current limiting.
Power supply. The internal protection circuit disables PWM output as long as VDD exceeds the
OVP trigger point.
The totem-pole output driver. Soft-driving waveform is implemented for improved EMI.
© 2008 Fairchild Semiconductor Corporation
FAN6751MR • Rev. 1.0.0
3
www.fairchildsemi.com