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AN-5031 Datasheet, PDF (3/5 Pages) Fairchild Semiconductor – GTLP Power Configuration
Linear Regulator VT
One approach to generating a fixed termination level is to
use a voltage regulator such as the Fairchild Semiconduc-
tor RC1585. This device is a 5A adjustable/fixed low drop-
out linear regulator designed specifically for GTLP use.
With an input voltage of 5V or less, the RC1585 offers a
regulated output range of 1.5V to 3.6V. Regulators are
known for their ability to source relatively high amounts of
current given their size. The RC1585 circuit, when properly
designed into an application, can handle microsecond
surge currents of 50A to 100A. These regulators also have
the ability to sink fair amounts of heat based on their physi-
cal size and structure. One disadvantage of this robust
device is power efficiency. Depending on the make and
model of a linear regulator and the application at hand, it is
possible to se a relatively low efficiency. With such a range
for input and output power ratings, the benefits of linear
regulators are often good trade-offs for efficiency. The solid
regulator output coupled with a storage cap for “tough to
manage” loads is an effective solution.
Regardless of the regulator chosen, this method still
requires a capable master voltage supply for input. Assum-
ing that a single regulator was used as a VT source and
provided the desired output at 60% efficiency. If one
100mA drive device were in operation and all 16 bits were
held LOW at maximum current (i.e. RT and VT is set such
that 100mA is traveling through each output buffer), the
total power required from VT is 1.6A. At 1.5V, the required
output power of the linear regulator is 2.4W. Operating at
60% efficiency, this equates to 4W required from the mas-
ter voltage supply.
FIGURE 4. GTLP Termination Circuit
Using a Linear Regular
Thevenin Equivalent VT
As PCB real estate decreases, there are instances where it
is not feasible to use a voltage regulator for VT. Another
option is to use voltage divider circuits off the VCC supply. If
done correctly, this can be a low cost solution to any
design. Since the circuit is tied directly to the master VCC
source, all noise and transients will be evident on VT. Pre-
cautions such as appropriate decoupling and resistor
power ratings must be made close to each 1.5V node.
The major concern with this method is determining exactly
how much resistance (RT) is seen by each trace and what
is the associated pull-up voltage level after properly consid-
ering all voltage drops. With GTLP backplane designs, a
termination resistor variation of even 5Ω can be easily
spotted in the signal's shape.
A sample divider from 3.3V down to 1.5V is not the com-
plete solution. All resistances must be considered simulta-
neously. One resistance that cannot be changed is internal
to the device – RDSON. The drive of the device dictates this
value, ranging from 3Ω to 6Ω for 100mA to 50mA drive,
respectively. Since R1 in parallel with R2 is the Thevenin
equivalent termination resistor, selecting resistors such that
the parallel combination matches the effective impedance
of the backplane and produces the correct voltage levels
can be difficult. Figure 5 is a general representation of the
complete circuit when a low bit is on the transmission line
and RDSON is seen.
When a high bit is on the transmission line, the VT node
only has the high impedance input of the receiver to con-
tend with. At this time, 1.5V is required from the node. It is
for this reason that each transmission line requires a sepa-
rate Thevenin termination. If two transmission lines were
connected to the same VT node and one bit was LOW
while the other was HIGH there would be contention.
Therefore, while this Thevenin approach is somewhat less
complicated than the linear regular method, some trade-
offs are made. Resistors are less costly than a regulator
but an additional 128 individual resistors would be required
for a 64-bit backplane if Thevenin were used instead of a
regulator with RT.
After considering appropriate resistor values and power
ratings, what other concerns exist? As with all voltage
dividers, a constant path to ground is provided. Therefore,
power is constantly dissipated through the resistor combi-
nation. Considering this during the Thevenin circuit design,
power consumption can be minimized during the resistor
selection process. The result can be an effective power
supply design that may be more cost effective to produce.
Keep in mind that the Thevenin method consumes twice
the power of an “ideal” linear regulator method. The effi-
ciency of the regulator, which varies between applications,
will be the deciding factor between choosing the Thevenin
or regulator method. Opting for a VT supply with higher effi-
ciency, such as a fly-back switching supply, can be another
consideration, although this option tends to be expensive.
Both the Thevenin and regulator methods can provide the
same level of noise isolation if supplied with the proper
bypass capacitors.
FIGURE 5. Representation of Thevenin Equivalent
Circuit for GTLP Termination
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