74LCX32646 Datasheet, PDF (3/11 Pages) Fairchild Semiconductor – Low Voltage 32-Bit Transceiver/Register with 5V Tolerant Inputs and Outputs (Preliminary)

Preliminary
Truth Table
(Note 3)
OE₁ DIR₁
Inputs
CPAB₁ CPBA₁ SAB₁
Data I/O (Note 4)
SBA₁ 1A_0–7 1B_0–7
Output Operation Mode
H
H
H
X
X
X
H or L
 _{ X}
H or L
X
X
X
X
X
Isolation
X
Input Input Clock A_n Data into A Register
X
Clock B_n Data Into B Register
L
L
H
H
^X
X
X
L
L
X
A_n to B_n — Real Time (Transparent Mode)
X
Input Output Clock A_n Data to A Register
L
L
H
H
^{H or L}
X
X
H
H
L
L
L
L
X
X
^X
X
X
L
L
L
L
X
X
^{H or L}
X
X
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Transition
X
A Register to B_n (Stored Mode)
X
Clock A_n Data into A Register and Output to B_n
L
B_n to A_n — Real Time (Transparent Mode)
L
Output Input Clock B_n Data into B Register
H
B Register to A_n (Stored Mode)
H
Clock B_n into B Register and Output to A_n
Note 3: Data I/O paths (1A and 1B: 0 - 7) is shown. This also applies to data I/O (1A and 1B: 8 - 15) and #2 control pins, to data (2A and 2B: 0 - 7) and #3
control pins, to data (2A and 2B: 8 - 15) and #4 control pins.
Note 4: The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled;
i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs.
3
www.fairchildsemi.com