HCPL0661 Datasheet, PDF (2/17 Pages) Fairchild Semiconductor – High Speed-10 MBit/s Logic Gate Optocouplers

N/C 1
+2
V
F
_3
N/C 4
8
V
CC
7V
E
6V
O
5 ^GND
N/C 1
+2
V_F
_3
N/C 4
8 VCC
7 V_E
6 V_O
5 GND
Single-channel circuit
drawing (HCPL0600 and
HCPL0601)
Single-channel circuit
drawing (HCPL0611)
TRUTH TABLE (Positive Logic)
Input
H
L
H
L
H*
L*
Enable
H
H
L
L
NC*
NC*
Output
L
H
H
H
L*
H*
*Dual channel devices or single channel devices with pin 7 not connected.
A 0.1 µF bypass capacitor must be connected between pins 8 and 5. (See note 1)
+1
V
F1
_2
_3
V
F2
+4
8
V
CC
7V
01
6V
02
5 ^GND
Dual-channel circuit
drawing (HCPL0630, HCPL0631
and HCPL0661)
2
HCPL0600, HCPL0601, HCPL0611, HCPL0630, HCPL0631, HCPL0661 Rev. 1.0.1
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