FXL5T244 Datasheet, PDF (2/8 Pages) Fairchild Semiconductor – Low Voltage Dual Supply 5-Bit Signal Translator with Configurable Voltage Supplies with Configurable Voltage Supplies

Terminal Descriptions
Terminal
Names
OE
A_n
Y_n
V_CCI
V_CCO
GND
Description
Output Enable Input
Data Inputs
3-STATE Outputs
Inputs Power Supply
Outputs Power Supply
Ground
Truth Table
Inputs
OE
A_n
L
L
L
H
H
X
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Outputs
Y_n
L
H
3-STATE
Connection Diagram
Terminal Assignments for DQFN
Terminal Assignment
Terminal Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Terminal Name
V_CCI
A₀
A₁
A₂
A₃
A₄
GND
OE
Y₄
Y₃
Y₂
Y₁
Y₀
V_CCO
(Top View)
Power-Up/Power-Down Sequencing
FXL translators offer an advantage in that either V_CC may
be powered up first. This benefit derives from the chip
design. When either V_CC is at 0 volts, outputs are in a
HIGH-Impedance state. The control input, OE, is designed
to track the V_CCI supply. A pull-up resistor tying OE to V_CCI
should be used to ensure that bus contention, excessive
currents, or oscillations do not occur during power-up/
power-down. The size of the pull-up resistor is based upon
the current-sinking capability of the OE driver.
The recommended power-up sequence is the following:
1. Apply power to either V_CC.
2. Apply power to the OE input (Logic HIGH for A-to-B
operation; Logic LOW for B-to-A operation) and to the
respective data inputs (A Port or B Port). This may
occur at the same time as Step 1.
3. Apply power to other V_CC.
4. Drive the OE input LOW to enable the device.
The recommended power-down sequence is the following:
1. Drive OE input HIGH to disable the device.
2. Remove power from either V_CC.
3. Remove power from other V_CC.
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