FXL2T245 Datasheet, PDF (2/9 Pages) Fairchild Semiconductor – Low Voltage Dual Supply 2-Bit Signal Translator with Configurable Voltage Supplies and Signal Levels and 3-STATE Outputs

Pin Descriptions
Pin Names
Description
OE
T/R
A_n
B_n
V_CCA
V_CCB
GND
Output Enable Input
Transmit/Receive Input
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
Side A Power Supply
Side B Power Supply
Ground
Truth Table
Inputs
OE
T/R
L
L
L
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Outputs
Bus B Data to Bus A
Bus A Data to Bus B
Connection Diagram
Pin Assignments for MicroPak
(Top View)
Pin Assignment
Pin Number
1
2
3
4
5
6
7
8
9
10
Terminal Name
V_CCA
A₀
A₁
T/R
GND
GND
OE
B₁
B₀
V_CCB
Power-Up/Power-Down Sequencing
FXL translators offer an advantage in that either V_CC may
be powered up first. This benefit derives from the chip
design. When either V_CC is at 0 volts, outputs are in a
HIGH-Impedance state. The control inputs (T/R and OE)
are designed to track the V_CCA supply. A pull-up resistor
tying OE to V_CCA should be used to ensure that bus con-
tention, excessive currents, or oscillations do not occur
during power-up/power-down. The size of the pull-up resis-
tor is based upon the current-sinking capability of the OE
driver.
The recommended power-up sequence is the following:
1. Apply power to either V_CC.
2. Apply power to the T/R input (Logic HIGH for A-to-B
operation; Logic LOW for B-to-A operation) and to the
respective data inputs (A Port or B Port). This may
occur at the same time as Step 1.
3. Apply power to other V_CC.
4. Drive the OE input LOW to enable the device.
The recommended power-down sequence is the following:
1. Drive OE input HIGH to disable the device.
2. Remove power from either V_CC.
3. Remove power from other V_CC.
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