FDMS7650_12 Datasheet, PDF (2/7 Pages) Fairchild Semiconductor – N-Channel PowerTrench® MOSFET 30 V, 100 A, 0.99 mΩ

Electrical Characteristics T_J = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BV_DSS
ΔBV_DSS
ΔT_J
I_DSS
I_GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I_D = 250 μA, V_GS = 0 V
30
I_D = 250 μA, referenced to 25 °C
V_DS = 24 V, V_GS = 0 V
V_GS = 20 V, V_DS = 0 V
V
15
mV/°C
1
μA
100
nA
On Characteristics
V_GS(th)
ΔV_GS(th)
ΔT_J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
r_DS(on)
Static Drain to Source On Resistance
g_FS
Forward Transconductance
V_GS = V_DS, I_D = 250 μA
1
I_D = 250 μA, referenced to 25 °C
V_GS = 10 V, I_D = 36 A
V_GS = 4.5 V, I_D = 32 A
V_GS = 10 V, I_D = 36 A, T_J = 125 °C
V_DS = 5 V, I_D = 36 A
1.9
3
V
-6
mV/°C
0.8
0.99
1.1
1.55
mΩ
1.1
1.7
267
S
Dynamic Characteristics
C_iss
C_oss
C_rss
R_g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V_DS = 15 V, V_GS = 0 V,
f = 1 MHz
11250 14965 pF
3050 4055
pF
240
360
pF
1.4
3
Ω
Switching Characteristics
t_d(on)
t_r
t_d(off)
t_f
Q_g
Q_g
Q_gs
Q_gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
V_DD = 15 V, I_D = 36 A,
V_GS = 10 V, R_GEN = 6 Ω
V_GS = 0 V to 10 V
V_GS = 0 V to 4.5 V V_DD = 15 V,
I_D = 36 A
28
45
ns
24
38
ns
83
133
ns
21
34
ns
149
209
nC
63
88
nC
34
nC
13
nC
Drain-Source Diode Characteristics
V_SD
Source to Drain Diode Forward Voltage
V_GS = 0 V, I_S = 2.1 A
V_GS = 0 V, I_S = 36 A
(Note 2)
(Note 2)
t_rr
Reverse Recovery Time
Q_rr
Reverse Recovery Charge
I_F = 36 A, di/dt = 100 A/μs
0.7
1.2
V
0.8
1.3
69
97
ns
56
90
nC
Notes:
1. R_θJA is determined with the device mounted on a 1in² pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R_θJC is guaranteed by design while R_θCA is determined by
the user's board design.
a. 50 °C/W when mounted on a
1 in² pad of 2 oz copper.
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. Starting T_J = 25 °C, L = 1 mH, I_AS = 33 A, V_DD = 27 V, V_GS = 10 V.
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.
©2012 Fairchild Semiconductor Corporation
2
FDMS7650 Rev.D3
www.fairchildsemi.com