FDD6782A Datasheet, PDF (2/6 Pages) Fairchild Semiconductor – N-Channel PowerTrench® MOSFET

Electrical Characteristics T_J = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max Units
Off Characteristics
BV_DSS
Drain to Source Breakdown Voltage
I_D = 250 µA, V_GS = 0 V
25
V
∆BV_DSS
∆T_J
Breakdown Voltage Temperature
Coefficient
I_D = 250 µA, referenced to 25 °C
16
mV/°C
I_DSS
Zero Gate Voltage Drain Current
V_DS = 20 V, V_GS = 0 V
1
µA
I_GSS
Gate to Source Leakage Current
V_GS = ±20 V, V_DS = 0 V
±100
nA
On Characteristics
V_GS(th)
∆V_GS(th)
∆T_J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
r_DS(on)
Static Drain to Source On Resistance
g_FS
Forward Transconductance
V_GS = V_DS, I_D = 250 µA
1.0
I_D = 250 µA, referenced to 25 °C
V_GS = 10 V, I_D = 14.9 A
V_GS = 4.5 V, I_D = 11.0 A
V_GS = 10 V, I_D = 14.9 A, T_J = 150 °C
V_DS = 5 V, I_D = 14.9 A
1.8
3.0
V
-6
mV/°C
8.3
10.5
17.8 24.0
mΩ
12.7 16.1
60
S
Dynamic Characteristics
C_iss
C_oss
C_rss
R_g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V_DS = 13 V, V_GS = 0 V,
f = 1MHz
f = 1MHz
800 1065
pF
162
220
pF
151
230
pF
1.0
Ω
Switching Characteristics
t_d(on)
t_r
t_d(off)
t_f
Q_g
Q_g
Q_gs
Q_gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
V_DD = 13 V, I_D = 14.9 A,
V_GS = 10 V, R_GEN = 6 Ω
V_GS = 0 V to 10 V
V_GS = 0 V to 5 V V_DD = 13 V,
I_D = 14.9 A
7
14
ns
3
10
ns
15
27
ns
2
4
ns
15
27
nC
8
16
nC
2.5
nC
3.2
nC
Drain-Source Diode Characteristics
V_SD
Source to Drain Diode Forward Voltage
V_GS = 0 V, I_S = 3.1 A
V_GS = 0 V, I_S = 14.9 A
(Note 2)
(Note 2)
t_rr
Reverse Recovery Time
Q_rr
Reverse Recovery Charge
I_F = 14.9 A, di/dt = 100 A/µs
0.8
1.2
V
0.9
1.3
14
26
ns
4
10
nC
Notes:
1: R_θJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R_θJC is guaranteed by design while R_θJA is determined by the user’s board design.
a) 40 °C/W when mounted on a
1 in² pad of 2 oz copper
b) 96 °C/W when mounted
on a minimum pad.
2: Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.
3: E_AS of 12 mJ is based on starting T_J = 25 °C, L = 1 mH, I_AS = 5 A, V_DD = 23 V, V_GS = 10 V. 100% test at L = 0.1 mH, I_AS = 12 A.
©2009 Fairchild Semiconductor Corporation
2
FDD6782A Rev.C
www.fairchildsemi.com