CD4071BC Datasheet, PDF (2/7 Pages) Fairchild Semiconductor – Quad 2-Input OR Buffered B Series Gate . Quad 2-Input AND Buffered B Series Gate

Schematic Diagrams
CD4071B
CD4081B
1_{/4 of device shown}
J=A+B
Logical “1” = HIGH
Logical “0” = LOW
*All inputs protected by standard CMOS protection circuit.
1_{/4 of device shown}
J=A•B
Logical “1” = HIGH
Logical “0” = LOW
All inputs protected by standard CMOS protection circuit.
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2