74LCX373_08 Datasheet, PDF (2/15 Pages) Fairchild Semiconductor – Low Voltage Octal Transparent Latch with 5V Tolerant Inputs and Outputs

Connection Diagrams
Pin Assignments for
SOIC, SOP, SSOP, TSSOP
OE 1
O0 2
D0 3
D1 4
O1 5
O2 ₆
D2 7
D3 8
O3 9
GND 10
20 V_CC
19 O7
18 D7
17 D₆
16 O6
15 ^O5
14 D5
13 D4
12 O4
11 LE
Pad Assignments for DQFN
OE VCC
1 20
O₀ 2
19 O₇
D0 3
18 D₇
D1 4
17 D₆
O1 5
16 O₆
O2 6
15 O₅
D2 7
14 D₅
D3 8
13 D₄
O3 9
12 O₄
10 11
GND LE
(Top View)
Pin Descriptions
Pin Names
D₀–D₇
LE
OE
O₀–O₇
Description
Data Inputs
Latch Enable Input
3-STATE Output Enable Input
3-STATE Latch Outputs
Logic Symbols
D0 D1 D2 D3 D4 D5 D6 D7
LE
OE
O0 O1 O2 O3 O4 O5 O6 O7
IEEE/IEC
OE EN
LE C1
D0 1D
O0
D1
O1
D2
O2
D3
O3
D4
O4
D5
O5
D6
O6
D7
O7
Truth Table
Inputs
Outputs
LE
OE
D_n
O_n
X
H
X
Z
H
L
L
L
H
L
H
H
L
L
X
O₀
H = HIGH Voltage
L = LOW Voltage
Z = High Impedance
X = Immaterial
O₀ = Previous O₀ before HIGH-to-LOW transition
of Latch Enable
Functional Description
The LCX373 contains eight D-type latches with 3-STATE
standard outputs. When the Latch Enable (LE) input is
HIGH, data on the D_n inputs enters the latches. In this
condition the latches are transparent, i.e. a latch output
will change state each time its D input changes. When
LE is LOW, the latches store the information that was
present on the D inputs a setup time preceding the
HIGH-to-LOW transition of LE. The 3-STATE standard
outputs are controlled by the Output Enable (OE) input.
When OE is LOW, the standard outputs are in the
2-state mode. When OE is HIGH, the standard outputs
are in the high impedance mode but this does not inter-
fere with entering new data into the latches.
©2006 Fairchild Semiconductor Corporation
74LCX373 Rev. 1.8.0
2
www.fairchildsemi.com