74LCX16500 Datasheet, PDF (2/10 Pages) Fairchild Semiconductor – Low Voltage 18-Bit Universal Bus Transceivers with 5V Tolerant Inputs and Outputs

Connection Diagrams
Pin Assignment for SSOP and TSSOP
Pin Assignment for FBGA
(Top Thru View)
Pin Descriptions
Pin Names
Description
A₁ - A₁₈
Data Register A Inputs/3-STATE Outputs
B₁ - B₁₈
Data Register B Inputs/3-STATE Outputs
CLKAB, CLKBA Clock Pulse Inputs
LEAB, LEBA Latch Enable Inputs
OEBA, OEBA Output Enable Inputs
FBGA Pin Assignments
1
2
3
4
5
6
A
A₂
A₁ OEAB GND B₁
B₂
B
A₄
A₃ LEAB CLKAB B₃
B₄
C
A₆
A₅
V_CC
V_CC
B₅
B₆
D
A₈
A₇ GND GND B₇
B₈
E
A₁₀
A₉ GND GND B₉
B₁₀
F
A₁₂ A₁₁ GND GND B₁₁ B₁₂
G
A₁₄ A₁₃ V_CC V_CC B₁₃ B₁₄
H
A₁₆ A₁₅ OEBA CLKBA B₁₅ B₁₆
J
A₁₇ A₁₈ LEBA GND B₁₈ B₁₇
Truth Table (Note 4)
Inputs
Output
OEAB LEAB CLKAB A_n
B_n
L
X
X
X
Z
H
H
X
L
L
H
H
X
H
H
H
L
↓
L
L
H
L
↓
H
H
H
L
H
X
B₀ (Note 5)
H
L
L
X
B₀ (Note 6)
Note 4: A-to-B data flow is shown: B-to-A flow is similar but uses OEBA,
LEBA, and CLKBA.
Note 5: Output level before the indicated steady-state input conditions
were established.
Note 6: Output level before the indicated steady-state input conditions
were established, provided that CLKAB was LOW before LEAB went LOW.
Functional Description
For A-to-B data flow, the LCX16500 operates in the trans-
parent mode when LEAB is HIGH. When LEAB is LOW,
the A data is latched if CLKAB is held at a HIGH or LOW
logic level. If LEAB is LOW, the A bus data is stored in the
latch/flip-flop on the HIGH-to-LOW transition of CLKAB.
Output-enable OEAB is active-HIGH. When OEAB is
HIGH, the outputs are active. When OEAB is LOW, the out-
puts are in the high impedance state.
Data flow for B to A is similar to that of A to B but uses
OEBA, LEBA, and CLKBA. The output enables are com-
plementary (OEAB is active HIGH and OEBA is active
LOW).
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