74F537 Datasheet, PDF (2/7 Pages) NXP Semiconductors – 1-of-10 decoder 3-State

Unit Loading/Fan Out
Pin Names
Description
A₀–A₃
E₁
E₂
OE
P
O₀–O₉
Truth Table
Address Inputs
Enable Input (Active LOW)
Enable Input (Active HIGH)
Output Enable Input (Active LOW)
Polarity Control Input
3-STATE Outputs
U.L.
HIGH/LOW
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
150/40 (33.3)
Input I_IH/I_IL
Output I_OH/I_OL
20 µA/−0.6 mA
20 µA/−0.6 mA
20 µA/−0.6 mA
20 µA/−0.6 mA
20 µA/−0.6 mA
−3 mA/24 mA (20 mA)
Function
High Impedance
Disable
Active HIGH
Output
(P = L)
Inputs
Outputs
OE E₁ E₂ A₃ A₂ A₁ A₀ O₀ O₁ O₂ O₃ O₄ O₅ O₆ O₇ O₈ O₉
HXXXXXX Z Z Z Z Z Z Z Z Z Z
LHXXXXX
LXLXXXX
Outputs Equal P Input
L LHL L L LHL L L L L L L L L
L LHL L LHLHL L L L L L L L
L LHL LHL L LHL L L L L L L
L LHL LHHL L LHL L L L L L
L LHLHL L L L L LHL L L L L
L LHLHLHL L L L LHL L L L
L LHLHHL L L L L L LHL L L
L LHLHHHL L L L L L LHL L
Active LOW
Output
(P = H)
L LHHL L L L L L L L L L LHL
L LHHL LHL L L L L L L L LH
L LHHXHX L L L L L L L L L L
L LHHHXX L L L L L L L L L L
L LHL L L L LHHHHHHHHH
L LHL L LHHLHHHHHHHH
L LHL LHLHHLHHHHHHH
L LHL LHHHHHLHHHHHH
L LHLHL LHHHHLHHHHH
L LHLHLHHHHHHLHHHH
L LHLHHLHHHHHHLHHH
L LHLHHHHHHHHHHLHH
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
L LHHL L LHHHHHHHHLH
L LHHL LHHHHHHHHHHL
L LHHXHXHHHHHHHHHH
L LHHHXXHHHHHHHHHH
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