74F521 Datasheet, PDF (2/8 Pages) NXP Semiconductors – 8-bit identity comparator

Unit Loading/Fan Out
Pin Names
Description
A₀–A₇
B₀–B₇
I_A=B
O_A=B
Word A Inputs
Word B Inputs
Expansion or Enable Input (Active LOW)
Identity Output (Active LOW)
U.L.
Input I_IH/I_IL
HIGH/LOW Output I_OH/I_OL
1.0/1.0 20 µA/−0.6 mA
1.0/1.0 20 µA/−0.6 mA
1.0/1.0 20 µA/−0.6 mA
50/33.3 −1 mA/20 mA
Truth Table
I_{A = B}
L
L
H
H
H = HIGH Voltage Level
L = LOW Voltage Level
Note 1: A₀ = B₀, A₁ = B₁, A₂ = B₂, etc.
Logic Diagram
Inputs
A, B
A = B (Note 1)
A≠B
A = B (Note 1)
A≠B
Output
O_{A = B}
L
H
H
H
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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