74F399 Datasheet, PDF (2/7 Pages) NXP Semiconductors – Registers

Functional Description
The 74F399 is a high-speed quad 2-port registers. They
select four bits of data from either of two sources (Ports)
under control of a common Select input (S). The selected
data is transferred to a 4-bit output register synchronous
with the LOW-to-HIGH transition of the Clock input (CP).
The 4-bit D-type output register is fully edge-triggered. The
Data inputs (I_0x, I_1x) and Select input (S) must be stable
only a setup time prior to and hold time after the LOW-to-
HIGH transition of the Clock input for predictable operation.
Logic Diagram
Function Table
Inputs
Outputs
S
I₀
I₁
Q
I
I
X
L
I
h
X
H
h
X
I
L
h
X
h
H
H = HIGH Voltage Level
L = LOW Voltage Level
h = HIGH Voltage Level one setup time prior to the LOW-to-HIGH
clock transition
I = LOW Voltage Level one setup time prior to the LOW-to-HIGH
clock transition
X = Immaterial
*F398 Only
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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