74F398 Datasheet, PDF (2/9 Pages) Fairchild Semiconductor – Quad 2-Port Register

Logic Symbols
74F398
74F398
74F399
74F399
IEEE/IEC
Unit Loading/Fan Out
Pin Names
Description
S
CP
I_0a–I_0d
I_1a–I_1d
Q_a–Q_d
Q_a–Q_d
Common Select Input
Clock Pulse Input (Active Rising Edge)
Data Inputs from Source 0
Data Inputs from Source 1
Register True Outputs
Register Complementary Outputs (74F398)
U.L.
HIGH/LOW
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
50/33.3
50/33.3
Input I_IH/I_IL
Output I_OH/I_OL
20 µA/−0.6 mA
20 µA/−0.6 mA
20 µA/−0.6 mA
20 µA/−0.6 mA
−1 mA/20 mA
−1 mA/20 mA
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