74ACT16543 Datasheet, PDF (2/6 Pages) Fairchild Semiconductor – 16-Bit Registered Transceiver with 3-STATE Outputs

Functional Description
The ACT16543 contains sixteen non-inverting transceivers
with 3-STATE outputs. The device is byte controlled with
each byte functioning identically, but independent of the
other. The control pins may be shorted together to obtain
full 16-bit operation. The following description applies to
each byte. For data flow from A to B, for example, the A-to-
B Enable (CEAB_n) input must be LOW in order to enter
data from A₀–A₁₅ or take data from B₀–B₁₅, as indicated in
the Data I/O Control Table. With CEAB_n LOW, a LOW sig-
nal on the A-to-B Latch Enable (LEAB_n) input makes the A-
to-B latches transparent; a subsequent LOW-to-HIGH tran-
sition of the LEAB_n signal puts the A latches in the storage
mode and their outputs no longer change with the A inputs.
With CEAB_n and OEAB_n both LOW, the 3-STATE B output
buffers are active and reflect the data present at the output
of the A latches. Control of data flow from B to A is similar,
but using the CEBA_n, LEBA_n and OEBA_n inputs.
Logic Diagrams
Data I/O Control Table
CEAB_n
H
X
L
X
L
Inputs
LEAB_n
X
H
L
X
X
OEAB_n
X
X
X
H
L
Latch Status
(Byte n)
Latched
Latched
Transparent
—
—
Output
Buffers
(Byte n)
High Z
—
—
High Z
Driving
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
A-to-B data flow shown; B-to-A flow control
is the same, except using CEBA_n, LEBA_n and OEBA_n
Byte 1
(0:7)
Byte 2
(8:15)
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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