74AC574_05 Datasheet, PDF (2/9 Pages) Fairchild Semiconductor – Octal D-Type Flip-Flop with 3-STATE Outputs

Logic Symbols
IEEE/IEC
Connection Diagram
Logic Diagram
Pin Descriptions
Pin Names
D₀–D₇
CP
OE
O₀–O₇
Description
Data Inputs
Clock Pulse Input
3-STATE Output Enable Input
3-STATE Outputs
Function Table
Inputs Internal Outputs
Function
OE CP D Q
H H L NC
H H H NC
 H
L
L
 H
HH
 L
L
L
 L
HH
L H L NC
L H H NC
H HIGH Voltage Level
L LOW Voltage Level
X Immaterial
Z High Impedance
LOW-to-HIGH Transition
NC No Change
O_N
Z Hold
Z Hold
Z Load
Z Load
L Data Available
H Data Available
NC No Change in Data
NC No Change in Data
Functional Description
The AC/ACT574 consists of eight edge-triggered flip-flops
with individual D-type inputs and 3-STATE true outputs.
The buffered clock and buffered Output Enable are com-
mon to all flip-flops. The eight flip-flops will store the state
of their individual D-type inputs that meet the setup and
hold time requirements on the LOW-to-HIGH Clock (CP)
transition. With the Output Enable (OE) LOW, the contents
of the eight flip-flops are available at the outputs. When OE
is HIGH, the outputs go to the high impedance state. Oper-
ation of the OE input does not affect the state of the flip-
flops.
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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