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FOD3120 Datasheet, PDF (16/22 Pages) Fairchild Semiconductor – High Noise Immunity, 2.5A Output Current, Gate Drive Optocoupler | |||
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Package Dimensions
Through Hole
4
3
5
6
21
7
8
PIN 1
ID.
0.270 (6.86)
0.250 (6.35)
0.200 (5.08)
MAX
0.022 (0.56)
0.016 (0.41)
0.390 (9.91)
0.370 (9.40)
0.070 (1.78)
0.045 (1.14)
0.156 (3.94)
0.144 (3.68)
0.020 (0.51)
MIN
0.154 (3.90)
0.120 (3.05)
0.100 (2.54) TYP
0.016 (0.40)
0.008 (0.20)
15° MAX
0.300 (7.62)
TYP
Surface Mount â 0.3" Lead Spacing (Option S)
0.390 (9.91)
0.370 (9.40)
4
3
2
1
PIN 1
ID.
0.270 (6.86)
0.250 (6.35)
5
6
7
8
0.156 (3.94)
0.144 (3.68)
0.070 (1.78)
0.045 (1.14)
0.300 (7.62)
TYP
0.020 (0.51)
MIN
0.016 (0.40)
0.008 (0.20)
0.200 (5.08)
MAX
0.022 (0.56)
0.016 (0.41)
0.015 (0.40) MIN
Both Sides
0.100 (2.54)
TYP
0.315 (8.00)
MIN
0.405 (10.30)
MAX.
Note:
All dimensions are in inches (millimeters)
0.4" Lead Spacing (Option T)
4
3
21
PIN 1
ID.
0.270 (6.86)
0.250 (6.35)
5
6
7
8
0.200 (5.08)
MAX
0.022 (0.56)
0.016 (0.41)
0.031 (0.78)
0.390 (9.91)
0.370 (9.40)
0.070 (1.78)
0.045 (1.14)
0.156 (3.94)
0.144 (3.68)
0.020 (0.51)
MIN
0.154 (3.90)
0.120 (3.05)
0.100 (2.54) TYP
0.016 (0.40)
0.008 (0.20)
0° to 15°
0.400 (10.16)
TYP
8-Pin Surface Mount DIP â Land Pattern
(Option S)
0.070 (1.78)
0.060 (1.52)
0.295 (7.49)
0.415 (10.54)
0.100 (2.54)
0.030 (0.76)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package speciï¬cations do not expand the terms of Fairchildâs worldwide terms and conditions,
speciï¬cally the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductorâs online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
©2003 Fairchild Semiconductor Corporation
FOD3120 Rev. 1.17.0
16
www.fairchildsemi.com
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