9403A Datasheet, PDF (15/16 Pages) Fairchild Semiconductor – First-In First-Out (FIFO) Buffer Memory

Timing Waveforms (Continued)
Conditions: stack not full, IES LOW when initialized
FIGURE 17. Parallel Load Mode, 4-Bit Word (Unexpanded) or Master in Parallel Expansion
Conditions: stack not full, device initialized (Note 3) with IES HIGH
FIGURE 18. Parallel Load, Slave Mode
Note 3: Initialization requires a master reset to occur after power has been applied.
Note 4: TTS normally connected to IRF.
Note 5: If stack if full, IRF will stay LOW.
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