FAN5093MTC Datasheet, PDF (14/17 Pages) Fairchild Semiconductor – Two Phase Interleaved Synchronous Buck Converter for VRM 9.x Applications

FAN5093
PRODUCT SPECIFICATION
the Schottky at the output current should be less than the for-
ward voltage of the MOSFET’s body diode. Power capability
is not a criterion for this device, as its dissipation is very
small.
Output Filter Capacitors
The output bulk capacitors of a converter help determine its
output ripple voltage and its transient response. It has
already been seen in the section on selecting an inductor that
the ESR helps set the minimum inductance. For most con-
verters, the number of capacitors required is determined by
the transient response and the output ripple voltage, and
these are determined by the ESR and not the capacitance
value. That is, in order to achieve the necessary ESR to meet
the transient and ripple requirements, the capacitance value
required is already very large.
The most commonly used choice for output bulk capacitors
is aluminum electrolytics, because of their low cost and low
ESR. The only type of aluminum capacitor used should be
those that have an ESR rated at 100kHz. Consult Application
Bulletin AB-14 for detailed information on output capacitor
selection.
For higher frequency applications, particularly those running
the FAN5093 oscillator at >1MHz, Oscon or ceramic capaci-
tors may be considered. They have much smaller ESR than
comparable electrolytics, but also much smaller capacitance.
The output capacitance should also include a number of
small value ceramic capacitors placed as close as possible to
the processor; 0.1µF and 0.01µF are recommended values.
Input Filter
The DC-DC converter design may include an input inductor
between the system main supply and the converter input as
shown in Figure 2. This inductor serves to isolate the main
supply from the noise in the switching portion of the DC-DC
converter, and to limit the inrush current into the input capac-
itors during power up. A value of 1.3µH is recommended.
It is necessary to have some low ESR capacitors at the input
to the converter. These capacitors deliver current when the
high side MOSFET switches on. Because of the interleaving,
the number of such capacitors required is greatly reduced
from that required for a single-phase buck converter. Figure
2 shows 3 x 1500µF, but the exact number required will vary
with the output voltage and current, according to the formula
I_rms = -^I-^o-₂--^u---^t 2DC – 4DC²
for the two phase FAN5093, where DC is the duty cycle,
DC = Vout / Vin. Capacitor ripple current rating is a function
of temperature, and so the manufacturer should be contacted
to find out the ripple current rating at the expected opera-
tional temperature. For details on the design of an input filter,
refer to Applications Bulletin AB-16.
L3
+12V
Vin
1000µF, 16V
Electrolytic
Figure 4. Input Filter
Design Considerations and Component
Selection
Additional information on design and component selection
may be found in Fairchild’s Application Note 59.
PCB Layout Guidelines
• Placement of the MOSFETs relative to the FAN5093 is
critical. Place the MOSFETs such that the trace length of
the HIDRV and LODRV pins of the FAN5093 to the FET
gates is minimized. A long lead length on these pins will
cause high amounts of ringing due to the inductance of the
trace and the gate capacitance of the FET. This noise
radiates throughout the board, and, because it is switching
at such a high voltage and frequency, it is very difficult to
suppress.
• In general, all of the noisy switching lines should be kept
away from the quiet analog section of the FAN5093. That
is, traces that connect to pins 8-17 (LODRV, HIDRV,
PGND and BOOT) should be kept far away from the
traces that connect to pins 1 through 7, and pins 18-24.
• Place the 0.1µF decoupling capacitors as close to the
FAN5093 pins as possible. Extra lead length on these
reduces their ability to suppress noise.
• Each power and ground pin should have its own via to the
appropriate plane. This helps provide isolation between
pins.
• Place the MOSFETs, inductor, and Schottky of a given
phase as close together as possible for the same reasons as
in the first bullet above. Place the input bulk capacitors as
close to the drains of the high side MOSFETs as possible.
In addition, placement of a 0.1µF decoupling cap right on
the drain of each high side MOSFET helps to suppress
some of the high frequency switching noise on the input
of the DC-DC converter.
• Place the output bulk capacitors as close to the CPU as
possible to optimize their ability to supply instantaneous
current to the load in the event of a current transient.
Additional space between the output capacitors and the
CPU will allow the parasitic resistance of the board traces
to degrade the DC-DC converter’s performance under
severe load transient conditions, causing higher voltage
deviation. For more detailed information regarding
capacitor placement, refer to Application Bulletin AB-5.
• A PC Board Layout Checklist is available from Fairchild
Applications. Ask for Application Bulletin AB-11.
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REV. 1.1.0 3/27/03