FAN7389_12 Datasheet, PDF (13/17 Pages) Fairchild Semiconductor – 3-Phase Half-Bridge Gate-Drive IC

Applications Information
1. Dead Time
Dead time is automatically inserted whenever the dead
time of the external two input signals (between HINx
and LINx signals) is shorter than internal fixed dead
times (DT1 and DT2). Otherwise, external dead times
larger than internal dead times are not modified by the
gate driver and internal dead-time waveform definition is
shown in Figure 37.
2.2 Shoot-Through Protection
The shoot-through protection circuitry prevents both
high- and low-side switches from conducting at the
same time, as shown Figure 39.
Figure 37.Internal Dead-Time Definitions
2. Protection Function
2_T._h1_eFa_hu_igl_ht _-O_au_nt _d( _FlOow) _-a_sn_idd_eU_dn_rd_ive_er_r-_sVo_inlt_ca_lug_de_eLo_uc_nk_do_eu_r-t_voltage
lockout (UVLO) protection circuitry that monitors the
supply voltage for V_DD and V_BS independently. It can be
designed to prevent malfunction when V_DD and V_BS are
lower than the specified threshold voltage. Also, the
UVLO hysteresis prevents chattering during power-
supply transitions. Moreover, the fault signal ( FO ) goes
to LOW state to operate reliably during power-on
events, when the power supply (V_DD) is below the
under-voltage lockout high threshold voltage for the
circuit (during t₁ ~ t₂). The UVLO circuit is not otherwise
activated; shown Figure 38.
Figure 38.Waveforms for Under-Voltage Lockout
Figure 39. Shoot-Through Protection
2.3 Enable Input
When the EN pin is in HIGH state, the gate driver
operates normally. When a condition occurs that should
shut down the gate driver, the EN pin should be LOW.
The enable circuitry has an input filter; the minimum
input duration is specified by t_FLTIN (typically 250 ns).
© 2010 Fairchild Semiconductor Corporation
FAN7389 • Rev. 1.0.2
Figure 40. Output Enable Timing Waveform
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