NM93CS06 Datasheet, PDF (12/16 Pages) Fairchild Semiconductor – (MICROWIRE™ Bus Interface) 256-Bit Serial EEPROM with Data Protect and Sequential Read

Timing Diagrams (Continued)
PROTECT REGISTER CLEAR CYCLE (PRCLEAR)
;;;;;;;;;
PRE
;;;;;;;;;
PE
;;;;;;;;;
t_CS
CS
SK
1 1 1 A5 A4
A1 A0
DI
Start Opcode
Bit Bits(2) _{High - Z}
DO
93CS06:
Address bits pattern -> 1-1-1-1-1-1
Address
Bits(6)
t_WP
Ready
Busy
PROTECT REGISTER WRITE CYCLE (PRWRITE)
;;;;;;;;;
PRE
;;;;;;;;;
PE
;;;;;;;;;
t_CS
CS
SK
1 0 1 A5 A4
A1 A0
DI
t_WP
Start Opcode
Address
Bit Bits(2) _{High - Z} Bits(6)
DO
Ready
Busy
93CS06:
Address bits pattern -> x-x-A3-A2-A1-A0; (x -> Don't Care, can be 0 or 1); (A3-A0 -> User defined)
PROTECT REGISTER DISABLE CYCLE (PRDS)
;;;;;;;;;
PRE
;;;;;;;;;
PE
;;;;;;;;;
t_CS
CS
SK
1 0 0 A5 A4
A1 A0
DI
Start Opcode
Address
Bit
Bits(2) _{High - Z} Bits(6)
DO
93CS06:
Address bits pattern -> 0-0-0-0-0-0
t_WP
Ready
Busy
NM93CS06 Rev. F.2
12
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