FSBB15CH60 Datasheet, PDF (12/16 Pages) Fairchild Semiconductor – Smart Power Module

C
P
U
15V line
Gating WH
Gating VH
Gating UH
Fault
Gating WL
Gating VL
Gating UL
5V line
R_S
R_PF
C_BPF
C_PF
Input Signal for Short-
Circuit Protection
R_BS
R_BS
R_BS
R_F
D_BS
C_BS
C_BSC
D_BS
C_BS
C_BSC
D_BS
C_BS
C_BSC
(19) V_B(W)
(18) V_CC(WH)
(17) IN_(WH)
(20) V_S(W)
(15) V_B(V)
(14) V_CC(VH)
(13) IN_(VH)
(16) V_S(V)
(11) V_B(U)
(10) V_CC(UH)
(9) IN_(UH)
(12) V_S(U)
C_SC
C_FOD
(8) C_SC
(7) C_FOD
(6) V_FO
(5) IN_(WL)
(4) IN_(VL)
(3) IN_(UL)
(2) COM
(1) V_CC(L)
C_SP15
C_SPC15
R_{E(W H)}
R_E(VH)
R_E(UH)
VB
VCC
COM
IN
OUT
VS
VB
VCC
COM
IN
OUT
VS
VB
VCC
COM
IN
OUT
VS
C(SC) ^OUT(WL)
C(FOD)
VFO
IN(WL) OUT(VL)
IN(VL)
IN(UL)
COM
VCC
OUT(UL)
V_SL
W-Phase Current
V-Phase Current
U-Phase Current
P (27)
W (26)
V (25)
U (24)
N_W (23)
N_V (22)
N_U (21)
R_FW
R_FV
R_FU
C_FW
C_FV
C_FU
M
C_DCS
Vdc
R_SW
R_SV
R_SU
Note:
1. To avoid malfunction, the wiring of each input should be as short as possible. (less than 2-3cm)
2. By virtue of integrating an application specific type HVIC inside the SPM, direct coupling to CPU terminals without any opto-coupler or transformer isolation is possible.
3. V_FO output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately 4.7kΩ resistance. Please refer to Figure. 9.
4. C_SP15 of around 7 times larger than bootstrap capacitor C_BS is recommended.
5. V_FO output pulse width should be determined by connecting an external capacitor(C_FOD) between C_FOD(pin7) and COM(pin2). (Example : if C_FOD = 33 nF, then t_FO = 1.8ms
(typ.)) Please refer to the note 5 for calculation method.
6. Input signal is High-Active type. There is a 3.3kΩ resistor inside the IC to pull down each input signal line to GND. When employing RC coupling circuits, set up such RC couple
that input signal agree with turn-off/turn-on threshold voltage.
7. To prevent errors of the protection function, the wiring around R_F and C_SC should be as short as possible.
8. In the short-circuit protection circuit, please select the R_FC_SC time constant in the range 1.5~2 µs.
9. Each capacitor should be mounted as close to the pins of the SPM as possible.
10. To prevent surge destruction, the wiring between the smoothing capacitor and the P&GND pins should be as short as possible. The use of a high frequency non-inductive
capacitor of around 0.1~0.22 µF between the P&GND pins is recommended.
11. Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and the relays.
12. C_SPC15 should be over 1uF and mounted as close to the pins of the SPM as possible.
Fig. 11. Typical Application Circuit
12
FSBB15CH60 Rev. C
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